[llvm] [MIR] Serialize MachineFrameInfo::isCalleeSavedInfoValid() (PR #90561)
David Tellenbach via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 30 16:25:20 PDT 2024
https://github.com/dtellenbach updated https://github.com/llvm/llvm-project/pull/90561
>From 9eec28ce63ee9913521e9ac31fe1e0ede55cd909 Mon Sep 17 00:00:00 2001
From: David Tellenbach <dtellenbach at apple.com>
Date: Mon, 29 Apr 2024 21:52:02 -0700
Subject: [PATCH] [MIR] Serialize MachineFrameInfo::isCalleeSavedInfoValid()
In case of functions without a stack frame no "stack" field is
serialized into MIR which leads to isCalleeSavedInfoValid being false
when reading a MIR file back in. To fix this we should serialize
MachineFrameInfo::isCalleeSavedInfoValid() into MIR.
---
llvm/include/llvm/CodeGen/MIRYamlMapping.h | 6 +-
llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 1 +
llvm/lib/CodeGen/MIRPrinter.cpp | 1 +
.../MIR/Generic/calleesaveinfovalid.mir | 158 ++++++++++++++++++
llvm/test/CodeGen/MIR/Generic/frame-info.mir | 1 +
5 files changed, 166 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/MIR/Generic/calleesaveinfovalid.mir
diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
index bb8dbb0478ff54..304db57eca4994 100644
--- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h
+++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
@@ -640,6 +640,7 @@ struct MachineFrameInfo {
bool HasVAStart = false;
bool HasMustTailInVarArgFunc = false;
bool HasTailCall = false;
+ bool IsCalleeSavedInfoValid = false;
unsigned LocalFrameSize = 0;
StringValue SavePoint;
StringValue RestorePoint;
@@ -663,7 +664,8 @@ struct MachineFrameInfo {
HasMustTailInVarArgFunc == Other.HasMustTailInVarArgFunc &&
HasTailCall == Other.HasTailCall &&
LocalFrameSize == Other.LocalFrameSize &&
- SavePoint == Other.SavePoint && RestorePoint == Other.RestorePoint;
+ SavePoint == Other.SavePoint && RestorePoint == Other.RestorePoint &&
+ IsCalleeSavedInfoValid == Other.IsCalleeSavedInfoValid;
}
};
@@ -691,6 +693,8 @@ template <> struct MappingTraits<MachineFrameInfo> {
YamlIO.mapOptional("hasMustTailInVarArgFunc", MFI.HasMustTailInVarArgFunc,
false);
YamlIO.mapOptional("hasTailCall", MFI.HasTailCall, false);
+ YamlIO.mapOptional("isCalleeSavedInfoValid", MFI.IsCalleeSavedInfoValid,
+ false);
YamlIO.mapOptional("localFrameSize", MFI.LocalFrameSize, (unsigned)0);
YamlIO.mapOptional("savePoint", MFI.SavePoint,
StringValue()); // Don't print it out when it's empty.
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index b65fc8cf5099b8..a5d6a40392d0cb 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -779,6 +779,7 @@ bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS,
MFI.setHasVAStart(YamlMFI.HasVAStart);
MFI.setHasMustTailInVarArgFunc(YamlMFI.HasMustTailInVarArgFunc);
MFI.setHasTailCall(YamlMFI.HasTailCall);
+ MFI.setCalleeSavedInfoValid(YamlMFI.IsCalleeSavedInfoValid);
MFI.setLocalFrameSize(YamlMFI.LocalFrameSize);
if (!YamlMFI.SavePoint.Value.empty()) {
MachineBasicBlock *MBB = nullptr;
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 6751fcf97087c7..26d534f369ae5f 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -368,6 +368,7 @@ void MIRPrinter::convert(ModuleSlotTracker &MST,
YamlMFI.HasVAStart = MFI.hasVAStart();
YamlMFI.HasMustTailInVarArgFunc = MFI.hasMustTailInVarArgFunc();
YamlMFI.HasTailCall = MFI.hasTailCall();
+ YamlMFI.IsCalleeSavedInfoValid = MFI.isCalleeSavedInfoValid();
YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
if (MFI.getSavePoint()) {
raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
diff --git a/llvm/test/CodeGen/MIR/Generic/calleesaveinfovalid.mir b/llvm/test/CodeGen/MIR/Generic/calleesaveinfovalid.mir
new file mode 100644
index 00000000000000..0e942bbc5d8b36
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/calleesaveinfovalid.mir
@@ -0,0 +1,158 @@
+
+# RUN: llc -run-pass=none -o - %s | FileCheck %s
+
+--- |
+
+ ; No stack, no callee-saved info -> no callee-saved info
+ define i32 @no_stack_no_calleesavedinfo(i32 noundef %0) #0 {
+ %2 = tail call i32 @f4(i32 noundef %0)
+ ret i32 %2
+ }
+
+ ; No stack but callee-saved info -> still callee-saved info
+ define i32 @no_stack_calleesavedinfo(i32 noundef %0) #0 {
+ %2 = tail call i32 @f4(i32 noundef %0)
+ ret i32 %2
+ }
+
+ ; Stack but no callee-saved info -> still callee-saved info
+ define i32 @stack_no_calleesavedinfo(i32 noundef %0) #0 {
+ %2 = call i32 @f4(i32 noundef %0)
+ %3 = add i32 %0, %2
+ ret i32 %3
+ }
+
+ ; Stack and callee-saved info -> still callee-saved info
+ define i32 @stack_calleesavedinfo(i32 noundef %0) #0 {
+ %2 = call i32 @f4(i32 noundef %0)
+ %3 = add i32 %0, %2
+ ret i32 %3
+ }
+
+ declare i32 @f4(i32 noundef)
+
+ attributes #0 = { nounwind }
+
+...
+---
+# CHECK-LABEL: name: no_stack_no_calleesavedinfo
+# CHECK: isCalleeSavedInfoValid: false
+name: no_stack_no_calleesavedinfo
+alignment: 4
+tracksRegLiveness: true
+tracksDebugUserValues: true
+liveins:
+ - { reg: '$w0' }
+frameInfo:
+ maxAlignment: 1
+ maxCallFrameSize: 0
+ hasTailCall: true
+ isCalleeSavedInfoValid: false
+stack: []
+machineFunctionInfo:
+ hasRedZone: false
+body: |
+ bb.0 (%ir-block.1):
+ liveins: $w0
+
+ TCRETURNdi @f4, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $w0
+
+...
+---
+# CHECK-LABEL: name: no_stack_calleesavedinfo
+# CHECK: isCalleeSavedInfoValid: true
+name: no_stack_calleesavedinfo
+alignment: 4
+tracksRegLiveness: true
+tracksDebugUserValues: true
+liveins:
+ - { reg: '$w0' }
+frameInfo:
+ maxAlignment: 1
+ maxCallFrameSize: 0
+ hasTailCall: true
+ isCalleeSavedInfoValid: true
+stack: []
+machineFunctionInfo:
+ hasRedZone: false
+body: |
+ bb.0 (%ir-block.1):
+ liveins: $w0
+
+ TCRETURNdi @f4, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $w0
+
+...
+---
+# CHECK-LABEL: name: stack_no_calleesavedinfo
+# CHECK: isCalleeSavedInfoValid: true
+name: stack_no_calleesavedinfo
+alignment: 4
+tracksRegLiveness: true
+tracksDebugUserValues: true
+liveins:
+ - { reg: '$w0' }
+frameInfo:
+ stackSize: 32
+ maxAlignment: 8
+ adjustsStack: true
+ hasCalls: true
+ maxCallFrameSize: 0
+ isCalleeSavedInfoValid: false
+stack:
+ - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '$lr' }
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '$fp' }
+ - { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$x19' }
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, callee-saved-register: '$x20' }
+machineFunctionInfo:
+ hasRedZone: false
+body: |
+ bb.0 (%ir-block.1):
+ liveins: $w0, $x19, $x20, $lr
+
+ early-clobber $sp = frame-setup STPXpre killed $x20, killed $x19, $sp, -4 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
+ frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
+ renamable $w19 = COPY $w0
+ BL @f4, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
+ $w0 = ADDWrr killed renamable $w19, killed renamable $w0
+ $fp, $lr = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
+ early-clobber $sp, $x20, $x19 = frame-destroy LDPXpost $sp, 4 :: (load (s64) from %stack.3), (load (s64) from %stack.2)
+ RET_ReallyLR implicit $w0
+
+...
+---
+# CHECK-LABEL: name: stack_calleesavedinfo
+# CHECK: isCalleeSavedInfoValid: true
+name: stack_calleesavedinfo
+alignment: 4
+tracksRegLiveness: true
+tracksDebugUserValues: true
+liveins:
+ - { reg: '$w0' }
+frameInfo:
+ stackSize: 32
+ maxAlignment: 8
+ adjustsStack: true
+ hasCalls: true
+ maxCallFrameSize: 0
+ isCalleeSavedInfoValid: true
+stack:
+ - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, callee-saved-register: '$lr' }
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, callee-saved-register: '$fp' }
+ - { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$x19' }
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, callee-saved-register: '$x20' }
+machineFunctionInfo:
+ hasRedZone: false
+body: |
+ bb.0 (%ir-block.1):
+ liveins: $w0, $x19, $x20, $lr
+
+ early-clobber $sp = frame-setup STPXpre killed $x20, killed $x19, $sp, -4 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
+ frame-setup STPXi killed $fp, killed $lr, $sp, 2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
+ renamable $w19 = COPY $w0
+ BL @f4, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
+ $w0 = ADDWrr killed renamable $w19, killed renamable $w0
+ $fp, $lr = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
+ early-clobber $sp, $x20, $x19 = frame-destroy LDPXpost $sp, 4 :: (load (s64) from %stack.3), (load (s64) from %stack.2)
+ RET_ReallyLR implicit $w0
+
+...
diff --git a/llvm/test/CodeGen/MIR/Generic/frame-info.mir b/llvm/test/CodeGen/MIR/Generic/frame-info.mir
index 4a897a9ec5e3bb..d5e014cf629915 100644
--- a/llvm/test/CodeGen/MIR/Generic/frame-info.mir
+++ b/llvm/test/CodeGen/MIR/Generic/frame-info.mir
@@ -44,6 +44,7 @@ tracksRegLiveness: true
# CHECK-NEXT: hasVAStart: false
# CHECK-NEXT: hasMustTailInVarArgFunc: false
# CHECK-NEXT: hasTailCall: false
+# CHECK-NEXT: isCalleeSavedInfoValid: false
# CHECK-NEXT: localFrameSize: 0
# CHECK-NEXT: savePoint: ''
# CHECK-NEXT: restorePoint: ''
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