[llvm] [RISCV] Combine `(setcc (riscv_selectcc A, B, ...), Y)` to just `(setcc A, B)` when possible (PR #90538)

[Yingwei Zheng via llvm-commits]

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@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=riscv32 < %s | FileCheck %s
+
+define i1 @eq(i32 %a, i32 %b, i32 %c, i32 %d) {
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dtcxzyw wrote:

It is incorrect. See https://alive2.llvm.org/ce/z/xjQp8n


https://github.com/llvm/llvm-project/pull/90538