[llvm] [AArch64][MC]Add diagnostic message for Multiple of 2 for ZPR128 (PR #90600)

[via llvm-commits]

https://github.com/CarolineConcatto created https://github.com/llvm/llvm-project/pull/90600

This patch fix the crash reported in:
https://github.com/llvm/llvm-project/issues/90589

>From 7e09578daa8a5191a0c635158d72fb2b6a730bf5 Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Tue, 30 Apr 2024 12:43:50 +0000
Subject: [PATCH] [AArch64][MC]Add diagnostic message for Multiple of 2 for
 ZPR128

This patch fix the crash reported in:
https://github.com/llvm/llvm-project/issues/90589
---
 llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |  4 ++++
 llvm/test/MC/AArch64/FP8_SME2/lut-diagnostics.s        | 10 ++++++++++
 2 files changed, 14 insertions(+)

diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index a3b966aa61550c..c9bba9bf63142c 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -6136,6 +6136,7 @@ bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
   case Match_InvalidSVEVectorListMul2x16:
   case Match_InvalidSVEVectorListMul2x32:
   case Match_InvalidSVEVectorListMul2x64:
+  case Match_InvalidSVEVectorListMul2x128:
     return Error(Loc, "Invalid vector list, expected list with 2 consecutive "
                       "SVE vectors, where the first vector is a multiple of 2 "
                       "and with matching element types");
@@ -6143,6 +6144,7 @@ bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
   case Match_InvalidSVEVectorListMul4x16:
   case Match_InvalidSVEVectorListMul4x32:
   case Match_InvalidSVEVectorListMul4x64:
+  case Match_InvalidSVEVectorListMul4x128:
     return Error(Loc, "Invalid vector list, expected list with 4 consecutive "
                       "SVE vectors, where the first vector is a multiple of 4 "
                       "and with matching element types");
@@ -6739,10 +6741,12 @@ bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   case Match_InvalidSVEVectorListMul2x16:
   case Match_InvalidSVEVectorListMul2x32:
   case Match_InvalidSVEVectorListMul2x64:
+  case Match_InvalidSVEVectorListMul2x128:
   case Match_InvalidSVEVectorListMul4x8:
   case Match_InvalidSVEVectorListMul4x16:
   case Match_InvalidSVEVectorListMul4x32:
   case Match_InvalidSVEVectorListMul4x64:
+  case Match_InvalidSVEVectorListMul4x128:
   case Match_InvalidSVEVectorListStrided2x8:
   case Match_InvalidSVEVectorListStrided2x16:
   case Match_InvalidSVEVectorListStrided2x32:
diff --git a/llvm/test/MC/AArch64/FP8_SME2/lut-diagnostics.s b/llvm/test/MC/AArch64/FP8_SME2/lut-diagnostics.s
index 36a5b12bc48231..3ad818141420e3 100644
--- a/llvm/test/MC/AArch64/FP8_SME2/lut-diagnostics.s
+++ b/llvm/test/MC/AArch64/FP8_SME2/lut-diagnostics.s
@@ -25,3 +25,13 @@ luti4   {z0.b - z12.b}, zt0, {z0-z1}
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
 // CHECK-NEXT: luti4   {z0.b - z12.b}, zt0, {z0-z1}
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+zip {z1.q-z2.q}, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: zip {z1.q-z2.q}, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+zip {z1.q-z4.q}, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
+// CHECK-NEXT: zip {z1.q-z4.q}, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: