[llvm] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (PR #90595)

[via llvm-commits]

github-actions[bot] wrote:

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git-clang-format --diff 6fab3f2a2b04048aaa7d76d067f6cd4704bb4002 db63bf34748f1ed67b96c9659d04608ef0e0a42b -- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 56ea18bcfa..ed421644b0 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1388,12 +1388,11 @@ public:
   void enforceOperandRCAlignment(MachineInstr &MI, unsigned OpName) const;
 
   bool isBarrierStart(uint16_t Opcode) const {
-    return
-      Opcode == AMDGPU::S_BARRIER ||
-      Opcode == AMDGPU::S_BARRIER_SIGNAL_M0 ||
-      Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_M0 ||
-      Opcode == AMDGPU::S_BARRIER_SIGNAL_IMM ||
-      Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_IMM;
+    return Opcode == AMDGPU::S_BARRIER ||
+           Opcode == AMDGPU::S_BARRIER_SIGNAL_M0 ||
+           Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_M0 ||
+           Opcode == AMDGPU::S_BARRIER_SIGNAL_IMM ||
+           Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_IMM;
   }
 };
 

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https://github.com/llvm/llvm-project/pull/90595