[llvm] [Hexagon] Add Hexagon Copy Hoisting pass (PR #89313)

[via llvm-commits]

mikaelholmen wrote:

Hello @quic-pmacmurr @iajbar and others,

If you run the new testcase
```
 test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
```
with verifiers on like:
```
llc -verify-machineinstrs -march=hexagon -run-pass hexagon-move-phicopy -o - test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
```
then you get a whole bunch of complaints:
```
# After Hexagon Copy Hoisting
********** INTERVALS **********
R0 [0B,32r:0) 0 at 0B-phi
R1 [0B,16r:0)[144r,144d:2)[208r,208d:1) 0 at 0B-phi 1 at 208r 2 at 144r
%0 [32r,128B:0)[176B,192r:0) 0 at 32r  weight:0.000000e+00
%1 [16r,80r:0) 0 at 16r  weight:0.000000e+00
%2 [48r,64r:0) 0 at 48r  weight:0.000000e+00
%3 [64r,96r:0) 0 at 64r  weight:0.000000e+00
%4 [80r,144r:0)[176B,208r:0) 0 at 80r  weight:0.000000e+00
%5 [192r,192d:0) 0 at 192r  weight:0.000000e+00
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function f0: NoPHIs, TracksLiveness
Frame Objects:
  fi#0: size=4, align=8, at location [SP]
Function Live Ins: $r0 in %0, $r1 in %1

0B	bb.0:
	; predecessors: %bb.1, %bb.2
	  successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
	  liveins: $r0, $r1
16B	  %1:intregs = COPY $r1
32B	  %0:intregs = COPY $r0
48B	  %2:predregs = C2_cmpgt %0:intregs, %1:intregs
64B	  %3:predregs = C2_not %2:predregs
80B	  %4:intregs = COPY %1:intregs
96B	  J2_jumpt %3:predregs, %bb.2, implicit-def dead $pc
112B	  J2_jump %bb.1, implicit-def dead $pc

128B	bb.1:
	; predecessors: %bb.0
	  successors: %bb.0(0x80000000); %bb.0(100.00%)

144B	  $r1 = COPY %4:intregs
160B	  J2_jump %bb.0, implicit-def dead $pc

176B	bb.2:
	; predecessors: %bb.0
	  successors: %bb.0(0x80000000); %bb.0(100.00%)

192B	  dead %5:intregs = COPY %0:intregs
208B	  $r1 = COPY %4:intregs
224B	  J2_jump %bb.0, implicit-def dead $pc

# End machine code for function f0.

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.1  (0x56371f809550) [128B;176B)
- liverange:   [0B,32r:0) 0 at 0B-phi
- regunit:     R0
- ValNo:       0 (def 0B)
 live into %bb.0 at 0B, not live before 176B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.2  (0x56371f809650) [176B;240B)
- liverange:   [0B,32r:0) 0 at 0B-phi
- regunit:     R0
- ValNo:       0 (def 0B)
 live into %bb.0 at 0B, not live before 240B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.1  (0x56371f809550) [128B;176B)
- liverange:   [0B,16r:0)[144r,144d:2)[208r,208d:1) 0 at 0B-phi 1 at 208r 2 at 144r
- regunit:     R1
- ValNo:       0 (def 0B)
 live into %bb.0 at 0B, not live before 176B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.2  (0x56371f809650) [176B;240B)
- liverange:   [0B,16r:0)[144r,144d:2)[208r,208d:1) 0 at 0B-phi 1 at 208r 2 at 144r
- regunit:     R1
- ValNo:       0 (def 0B)
 live into %bb.0 at 0B, not live before 240B
LLVM ERROR: Found 4 machine code errors.
```

(I noticed this when I ran lit tests after compiling with EXPENSIVE_CHECKS on. But as you see above you can reproduce just by adding -verify-machineinstrs to the llc command)


https://github.com/llvm/llvm-project/pull/89313