[llvm] [RISCV] Add DAG combine for (vmv_s_x_vl (undef) (vmv_x_s X). (PR #90524)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 29 21:49:04 PDT 2024


================
@@ -16791,6 +16791,11 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
     SDValue Scalar = N->getOperand(1);
     SDValue VL = N->getOperand(2);
 
+    if (Scalar.getOpcode() == RISCVISD::VMV_X_S &&
+        Scalar.getOperand(0).getValueType() == N->getValueType(0) &&
+        N->getOperand(0).isUndef())
----------------
lukel97 wrote:

```suggestion
        Passthru.isUndef())
```

https://github.com/llvm/llvm-project/pull/90524


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