[llvm] [RISCV] Add DAG combine for (vmv_s_x_vl (undef) (vmv_x_s X). (PR #90524)

[Craig Topper via llvm-commits]

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@@ -16791,6 +16791,11 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
     SDValue Scalar = N->getOperand(1);
     SDValue VL = N->getOperand(2);
 
+    if (Scalar.getOpcode() == RISCVISD::VMV_X_S &&
+        Scalar.getOperand(0).getValueType() == N->getValueType(0) &&
+        isa<ConstantSDNode>(N->getOperand(2)) && N->getOperand(0).isUndef())
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topperc wrote:

We don't. I found this code in my downstream and didn't scrutinize it.

https://github.com/llvm/llvm-project/pull/90524