[llvm] [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (PR #89170)

[Shih-Po Hung via llvm-commits]

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@@ -1612,29 +1612,58 @@ InstructionCost RISCVTTIImpl::getArithmeticInstrCost(
   if (Op2Info.isConstant())
     ConstantMatCost += getConstantMatCost(1, Op2Info);
 
+  // Assuming instructions falling through the switch-cases have the same cost
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arcbbb wrote:

Exactly! That captures what I was trying to convey.  Thank you!

https://github.com/llvm/llvm-project/pull/89170