[llvm] [RISCV] Remove SEW operand for load/store and SEW-aware pseudos (PR #90396)

[Craig Topper via llvm-commits]

================
@@ -917,56 +925,62 @@ class VPseudoILoadMask<VReg RetClass,
 class VPseudoUSStoreNoMask<VReg StClass,
                            int EEW> :
       Pseudo<(outs),
-             (ins StClass:$rd, GPRMem:$rs1, AVL:$vl, ixlenimm:$sew), []>,
+      !if(!eq(EEW, 1),
+          (ins StClass:$rd, GPRMem:$rs1, AVL:$vl, ixlenimm:$sew),
+          (ins StClass:$rd, GPRMem:$rs1, AVL:$vl)), []>,
       RISCVVPseudo,
       RISCVVSE</*Masked*/0, /*Strided*/0, !logtwo(EEW), VLMul> {
   let mayLoad = 0;
   let mayStore = 1;
   let hasSideEffects = 0;
   let HasVLOp = 1;
-  let HasSEWOp = 1;
+  // For mask store, EEW = 1.
----------------
topperc wrote:

I think "mask store" here means a store where the data value is a mask. Specifically the vsm instruction. The NoMask means that v0 isn't used to indicate which elements get stored, what may be referred to as a "masked store". `vsm` doesn't support masking off elements.

https://github.com/llvm/llvm-project/pull/90396