[llvm] [DAG] SelectionDAG.computeKnownBits - add NSW/NUW flags support to ISD::SHL handling (PR #89877)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 29 02:59:56 PDT 2024
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@@ -0,0 +1,115 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64
+
+define i32 @sext_known_nonzero(i16 %xx) {
+; X86-LABEL: sext_known_nonzero:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl $256, %eax # imm = 0x100
+; X86-NEXT: shll %cl, %eax
+; X86-NEXT: cwtl
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: je .LBB0_1
+; X86-NEXT: # %bb.2: # %cond.false
+; X86-NEXT: rep bsfl %eax, %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB0_1:
+; X86-NEXT: movl $32, %eax
+; X86-NEXT: retl
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RKSimon wrote:
this indentation looks off - was this generated by the update_llc_test_checks script?
https://github.com/llvm/llvm-project/pull/89877
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