[llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)

[Sander de Smalen via llvm-commits]

https://github.com/sdesmalen-arm requested changes to this pull request.

On lines 58-68, there is some code that suggests the calling convention has  additional requirements that need to be taken into account:

```    // The calling convention for passing SVE tuples states that in the event
    // we cannot allocate enough registers for the tuple we should still leave
    // any remaining registers unallocated. However, when we call the
    // CCAssignFn again we want it to behave as if all remaining registers are
    // allocated. This will force the code to pass the tuple indirectly in
    // accordance with the PCS.
    bool RegsAllocated[8];
    for (int I = 0; I < 8; I++) {
      RegsAllocated[I] = State.isAllocated(ZRegList[I]);
      State.AllocateReg(ZRegList[I]);
    }
```

This applies to both Z registers and P registers. I believe this corresponds to 
[AAPCS (parameter passing)](https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#parameter-passing) Step `C.7` and `C.8`.

Could you also add some tests for this?

https://github.com/llvm/llvm-project/pull/90122