[clang] [llvm] [RISCV] Teach .option arch to support experimental extensions. (PR #89727)
Yeting Kuo via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 29 00:41:42 PDT 2024
https://github.com/yetingk updated https://github.com/llvm/llvm-project/pull/89727
>From a43014cf3daa1b0fd9092bfe41da979205ba64aa Mon Sep 17 00:00:00 2001
From: Yeting Kuo <yeting.kuo at sifive.com>
Date: Tue, 23 Apr 2024 02:16:04 -0700
Subject: [PATCH 1/4] [RISCV] Teach .option arch to support experimental
extensions.
Previously .option arch denied extenions are not belongs to RISC-V features. But
experimental features have experimental- prefix, so .option arch can not
serve for experimental extension.
This patch uses the features of extensions to identify extension
existance.
---
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 7 ++++---
llvm/test/MC/RISCV/option-arch.s | 9 ++++++++-
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 3f4a73ad89bf8a..80ff70f1095f4c 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2824,8 +2824,9 @@ bool RISCVAsmParser::parseDirectiveOption() {
break;
}
- auto Ext = llvm::lower_bound(RISCVFeatureKV, Arch);
- if (Ext == std::end(RISCVFeatureKV) || StringRef(Ext->Key) != Arch ||
+ std::string &&Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
+ auto Ext = llvm::lower_bound(RISCVFeatureKV, Feature);
+ if (Ext == std::end(RISCVFeatureKV) || StringRef(Ext->Key) != Feature ||
!RISCVISAInfo::isSupportedExtension(Arch)) {
if (isDigit(Arch.back()))
return Error(
@@ -2834,7 +2835,7 @@ bool RISCVAsmParser::parseDirectiveOption() {
return Error(Loc, "unknown extension feature");
}
- Args.emplace_back(Type, Ext->Key);
+ Args.emplace_back(Type, Arch.str());
if (Type == RISCVOptionArchArgType::Plus) {
FeatureBitset OldFeatureBits = STI->getFeatureBits();
diff --git a/llvm/test/MC/RISCV/option-arch.s b/llvm/test/MC/RISCV/option-arch.s
index 6ee133c7159a27..40675f9e4b434b 100644
--- a/llvm/test/MC/RISCV/option-arch.s
+++ b/llvm/test/MC/RISCV/option-arch.s
@@ -1,7 +1,7 @@
# RUN: llvm-mc -triple riscv32 -show-encoding < %s \
# RUN: | FileCheck -check-prefixes=CHECK %s
# RUN: llvm-mc -triple riscv32 -filetype=obj < %s \
-# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+m,+a,+f,+zba -d -M no-aliases - \
+# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+m,+a,+f,+zba,+experimental-zicfiss -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-INST %s
# Test '.option arch, +' and '.option arch, -' directive
@@ -78,6 +78,13 @@ lr.w t0, (t1)
# CHECK: encoding: [0xb3,0x22,0x73,0x20]
sh1add t0, t1, t2
+# Test experimental extension
+# CHECK: .option arch, +zicfiss
+.option arch, +zicfiss
+# CHECK-INST: sspopchk ra
+# CHECK: encoding: [0x73,0xc0,0xc0,0xcd]
+sspopchk ra
+
# Test '.option arch, <arch-string>' directive
# CHECK: .option arch, rv32i2p1_m2p0_a2p1_c2p0
.option arch, rv32i2p1_m2p0_a2p1_c2p0
>From 471abce617a9d18ef91370303eef90bab228d9d3 Mon Sep 17 00:00:00 2001
From: Yeting Kuo <yeting.kuo at sifive.com>
Date: Tue, 23 Apr 2024 21:55:12 -0700
Subject: [PATCH 2/4] Make this pr obey menable-experimental-extensions.
---
clang/lib/Driver/ToolChains/Clang.cpp | 5 +++++
clang/test/Driver/riscv-option-arch.s | 5 +++++
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 6 ++++++
3 files changed, 16 insertions(+)
create mode 100644 clang/test/Driver/riscv-option-arch.s
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
index 5894a48e0e378b..8b0f523763486f 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -8449,6 +8449,11 @@ void ClangAs::AddRISCVTargetArgs(const ArgList &Args,
CmdArgs.push_back("-mllvm");
CmdArgs.push_back("-riscv-add-build-attributes");
}
+
+ if (!Args.hasArg(options::OPT_menable_experimental_extensions)) {
+ CmdArgs.push_back("-mllvm");
+ CmdArgs.push_back("-riscv-disable-experimental-ext");
+ }
}
void ClangAs::ConstructJob(Compilation &C, const JobAction &JA,
diff --git a/clang/test/Driver/riscv-option-arch.s b/clang/test/Driver/riscv-option-arch.s
new file mode 100644
index 00000000000000..8ce84dd8ffe79d
--- /dev/null
+++ b/clang/test/Driver/riscv-option-arch.s
@@ -0,0 +1,5 @@
+# RUN: %clang --target=riscv64 -menable-experimental-extensions -c -o /dev/null %s
+# RUN: ! %clang --target=riscv64 -c -o /dev/null %s 2>&1 | FileCheck -check-prefixes=CHECK-ERR %s
+
+.option arch, +zicfiss
+# CHECK-ERR: Unexpected experimental extensions.
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 80ff70f1095f4c..6225e0707015fe 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -51,6 +51,9 @@ STATISTIC(RISCVNumInstrsCompressed,
static cl::opt<bool> AddBuildAttributes("riscv-add-build-attributes",
cl::init(false));
+static cl::opt<bool>
+ DisableExperimentalExtension("riscv-disable-experimental-ext",
+ cl::init(false));
namespace llvm {
extern const SubtargetFeatureKV RISCVFeatureKV[RISCV::NumSubtargetFeatures];
@@ -2825,6 +2828,9 @@ bool RISCVAsmParser::parseDirectiveOption() {
}
std::string &&Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
+ if (DisableExperimentalExtension &&
+ StringRef(Feature).starts_with("experimental-"))
+ return Error(Loc, "Unexpected experimental extensions.");
auto Ext = llvm::lower_bound(RISCVFeatureKV, Feature);
if (Ext == std::end(RISCVFeatureKV) || StringRef(Ext->Key) != Feature ||
!RISCVISAInfo::isSupportedExtension(Arch)) {
>From 066445e8df415373b2f115e9b36b166b6b8ccfa9 Mon Sep 17 00:00:00 2001
From: Yeting Kuo <yeting.kuo at sifive.com>
Date: Tue, 23 Apr 2024 23:09:52 -0700
Subject: [PATCH 3/4] Remove unneeded rvalue reference.
---
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 6225e0707015fe..5b601f33b3e55d 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2827,7 +2827,7 @@ bool RISCVAsmParser::parseDirectiveOption() {
break;
}
- std::string &&Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
+ std::string Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
if (DisableExperimentalExtension &&
StringRef(Feature).starts_with("experimental-"))
return Error(Loc, "Unexpected experimental extensions.");
>From 24149462cc6324fc78a44af840aac04ff49ba42c Mon Sep 17 00:00:00 2001
From: Yeting Kuo <yeting.kuo at sifive.com>
Date: Thu, 25 Apr 2024 21:59:40 -0700
Subject: [PATCH 4/4] Use feature to allow/disallow experimental extensions.
---
clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 3 +++
clang/lib/Driver/ToolChains/Clang.cpp | 5 -----
clang/test/Driver/riscv-default-features.c | 4 ++--
clang/test/Driver/riscv-option-arch.c | 7 +++++++
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 9 ++++-----
llvm/lib/Target/RISCV/RISCVFeatures.td | 4 ++++
6 files changed, 20 insertions(+), 12 deletions(-)
create mode 100644 clang/test/Driver/riscv-option-arch.c
diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
index 96b3cc3bb8ffb1..b16f734f3a5552 100644
--- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -169,6 +169,9 @@ void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple,
Features.push_back("-relax");
}
+ if (!Args.hasArg(options::OPT_menable_experimental_extensions))
+ Features.push_back("+no-experimental-ext");
+
// Android requires fast unaligned access on RISCV64.
if (Triple.isAndroid()) {
Features.push_back("+unaligned-scalar-mem");
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
index 8b0f523763486f..5894a48e0e378b 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -8449,11 +8449,6 @@ void ClangAs::AddRISCVTargetArgs(const ArgList &Args,
CmdArgs.push_back("-mllvm");
CmdArgs.push_back("-riscv-add-build-attributes");
}
-
- if (!Args.hasArg(options::OPT_menable_experimental_extensions)) {
- CmdArgs.push_back("-mllvm");
- CmdArgs.push_back("-riscv-disable-experimental-ext");
- }
}
void ClangAs::ConstructJob(Compilation &C, const JobAction &JA,
diff --git a/clang/test/Driver/riscv-default-features.c b/clang/test/Driver/riscv-default-features.c
index 4c3883c1cc1184..4b1c5322b8be6a 100644
--- a/clang/test/Driver/riscv-default-features.c
+++ b/clang/test/Driver/riscv-default-features.c
@@ -1,8 +1,8 @@
// RUN: %clang --target=riscv32-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV32
// RUN: %clang --target=riscv64-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV64
-// RV32: "target-features"="+32bit,+a,+c,+m,+relax,
-// RV64: "target-features"="+64bit,+a,+c,+m,+relax,
+// RV32: "target-features"="+32bit,+a,+c,+m,+no-experimental-ext,+relax,
+// RV64: "target-features"="+64bit,+a,+c,+m,+no-experimental-ext,+relax,
// Dummy function
int foo(void){
diff --git a/clang/test/Driver/riscv-option-arch.c b/clang/test/Driver/riscv-option-arch.c
new file mode 100644
index 00000000000000..e583e9fd62b08c
--- /dev/null
+++ b/clang/test/Driver/riscv-option-arch.c
@@ -0,0 +1,7 @@
+// RUN: %clang --target=riscv64 -menable-experimental-extensions -c -o /dev/null %s
+// RUN: ! %clang --target=riscv64 -c -o /dev/null %s 2>&1 | FileCheck -check-prefixes=CHECK-ERR %s
+
+void foo() {
+ asm volatile (".option arch, +zicfiss");
+ // CHECK-ERR: Unexpected experimental extensions.
+}
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 5b601f33b3e55d..f65b936d49cfb4 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -51,10 +51,6 @@ STATISTIC(RISCVNumInstrsCompressed,
static cl::opt<bool> AddBuildAttributes("riscv-add-build-attributes",
cl::init(false));
-static cl::opt<bool>
- DisableExperimentalExtension("riscv-disable-experimental-ext",
- cl::init(false));
-
namespace llvm {
extern const SubtargetFeatureKV RISCVFeatureKV[RISCV::NumSubtargetFeatures];
} // namespace llvm
@@ -87,6 +83,9 @@ class RISCVAsmParser : public MCTargetAsmParser {
SMLoc getLoc() const { return getParser().getTok().getLoc(); }
bool isRV64() const { return getSTI().hasFeature(RISCV::Feature64Bit); }
bool isRVE() const { return getSTI().hasFeature(RISCV::FeatureStdExtE); }
+ bool disableExperimentalExtension() const {
+ return getSTI().hasFeature(RISCV::FeatureNoExperimentalExtension);
+ }
RISCVTargetStreamer &getTargetStreamer() {
assert(getParser().getStreamer().getTargetStreamer() &&
@@ -2828,7 +2827,7 @@ bool RISCVAsmParser::parseDirectiveOption() {
}
std::string Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
- if (DisableExperimentalExtension &&
+ if (disableExperimentalExtension() &&
StringRef(Feature).starts_with("experimental-"))
return Error(Loc, "Unexpected experimental extensions.");
auto Ext = llvm::lower_bound(RISCVFeatureKV, Feature);
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index b064191b838e5b..76d133d406b25a 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -1309,3 +1309,7 @@ def FeatureForcedSWShadowStack : SubtargetFeature<
"forced-sw-shadow-stack", "HasForcedSWShadowStack", "true",
"Implement shadow stack with software.">;
def HasForcedSWShadowStack : Predicate<"Subtarget->hasForcedSWShadowStack()">;
+
+def FeatureNoExperimentalExtension : SubtargetFeature<
+ "no-experimental-ext", "HasNoExperimentalExt", "true",
+ "Disallow to use experimental extension.">;
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