[llvm] e2b8af7 - [RISCV] Don't use MachineInstr::isIdenticalTo in hasSameAVL (#90431)

via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 29 00:08:42 PDT 2024


Author: Luke Lau
Date: 2024-04-29T15:08:38+08:00
New Revision: e2b8af7e149c38e3b7ab0d25f86792fcbdd06507

URL: https://github.com/llvm/llvm-project/commit/e2b8af7e149c38e3b7ab0d25f86792fcbdd06507
DIFF: https://github.com/llvm/llvm-project/commit/e2b8af7e149c38e3b7ab0d25f86792fcbdd06507.diff

LOG: [RISCV] Don't use MachineInstr::isIdenticalTo in hasSameAVL (#90431)

MachineInstr::isIdenticalTo compares that the operands and flags are the
same IIUC, but I think we actually want to check that it's the same
MachineInstr * with respect to position in the block etc.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index b5fd508fa77de2..b27e1dd258ebd0 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -568,8 +568,8 @@ class VSETVLIInfo {
 
   bool hasSameAVL(const VSETVLIInfo &Other) const {
     if (hasAVLReg() && Other.hasAVLReg())
-      return getAVLDefMI().isIdenticalTo(Other.getAVLDefMI()) &&
-             getAVLReg() == Other.getAVLReg();
+      return AVLRegDef.DefMI == Other.AVLRegDef.DefMI &&
+             AVLRegDef.DefReg == Other.AVLRegDef.DefReg;
 
     if (hasAVLImm() && Other.hasAVLImm())
       return getAVLImm() == Other.getAVLImm();


        


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