[llvm] [MIPS]: Rework atomic max/min expand for subword (PR #89575)
YunQiang Su via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 21 23:58:01 PDT 2024
https://github.com/wzssyqa created https://github.com/llvm/llvm-project/pull/89575
The current code is so buggy: it can work for few cases. The problems include:
1. ll/sc works on a whole word, while other parts other than we rmw are dropped.
2. The oprands are not well zero-extended for unsigned ops.
3. It doesn't work for big-endian, as the postion of subword differs with little endian.
>From 9a3055017f442d16daeccd561de7445ae2ab470c Mon Sep 17 00:00:00 2001
From: YunQiang Su <syq at gcc.gnu.org>
Date: Mon, 22 Apr 2024 14:48:51 +0800
Subject: [PATCH] [MIPS]: Rework atomic max/min expand for subword
The current code is so buggy: it can work for few cases.
The problems include:
1. ll/sc works on a whole word, while other parts other than we rmw
are dropped.
2. The oprands are not well zero-extended for unsigned ops.
3. It doesn't work for big-endian, as the postion of subword differs
with little endian.
---
llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 112 +-
llvm/test/CodeGen/Mips/atomic-min-max.ll | 1475 +++++++++++----------
2 files changed, 821 insertions(+), 766 deletions(-)
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index c30129743a9626..0977f76b750c88 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -342,6 +342,7 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
bool IsMin = false;
bool IsMax = false;
bool IsUnsigned = false;
+ bool DestOK = false;
unsigned Opcode = 0;
switch (I->getOpcode()) {
@@ -388,6 +389,7 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
+ SEOp = Mips::SEB;
IsUnsigned = true;
IsMin = true;
break;
@@ -403,6 +405,7 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
+ SEOp = Mips::SEB;
IsUnsigned = true;
IsMax = true;
break;
@@ -473,48 +476,36 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
unsigned SELOldVal = IsMax ? SELEQZ : SELNEZ;
unsigned MOVIncr = IsMax ? MOVN : MOVZ;
- // For little endian we need to clear uninterested bits.
- if (STI->isLittle()) {
- if (!IsUnsigned) {
- BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
- .addReg(OldVal)
- .addReg(ShiftAmnt);
- BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
- .addReg(Incr)
- .addReg(ShiftAmnt);
- if (STI->hasMips32r2()) {
- BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
- BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
- } else {
- const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
- }
- } else {
- // and OldVal, OldVal, Mask
- // and Incr, Incr, Mask
- BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
- .addReg(OldVal)
- .addReg(Mask);
- BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
- .addReg(Incr)
- .addReg(Mask);
- }
+ BuildMI(loopMBB, DL, TII->get(Mips::SRAV), StoreVal)
+ .addReg(OldVal)
+ .addReg(ShiftAmnt);
+ if (STI->hasMips32r2() && !IsUnsigned) {
+ BuildMI(loopMBB, DL, TII->get(SEOp), StoreVal).addReg(StoreVal);
+ } else if (STI->hasMips32r2() && IsUnsigned) {
+ const unsigned OpMask = SEOp == Mips::SEH ? 0xffff : 0xff;
+ BuildMI(loopMBB, DL, TII->get(Mips::ANDi), StoreVal).addReg(StoreVal).addImm(OpMask);
+ } else {
+ const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
+ const unsigned SROp = IsUnsigned ? Mips::SRL : Mips::SRA;
+ BuildMI(loopMBB, DL, TII->get(Mips::SLL), StoreVal)
+ .addReg(StoreVal, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(SROp), StoreVal)
+ .addReg(StoreVal, RegState::Kill)
+ .addImm(ShiftImm);
}
- // unsigned: sltu Scratch4, oldVal, Incr
- // signed: slt Scratch4, oldVal, Incr
+ BuildMI(loopMBB, DL, TII->get(Mips::OR), Dest)
+ .addReg(Mips::ZERO)
+ .addReg(StoreVal);
+ DestOK = true;
+ BuildMI(loopMBB, DL, TII->get(Mips::SLLV), StoreVal)
+ .addReg(StoreVal)
+ .addReg(ShiftAmnt);
+
+ // unsigned: sltu Scratch4, StoreVal, Incr
+ // signed: slt Scratch4, StoreVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)
- .addReg(OldVal)
+ .addReg(StoreVal)
.addReg(Incr);
if (STI->hasMips64r6() || STI->hasMips32r6()) {
@@ -525,7 +516,7 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// seleqz Scratch4, Incr, Scratch4
// or BinOpRes, BinOpRes, Scratch4
BuildMI(loopMBB, DL, TII->get(SELOldVal), BinOpRes)
- .addReg(OldVal)
+ .addReg(StoreVal)
.addReg(Scratch4);
BuildMI(loopMBB, DL, TII->get(SELIncr), Scratch4)
.addReg(Incr)
@@ -534,12 +525,12 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
.addReg(BinOpRes)
.addReg(Scratch4);
} else {
- // max: move BinOpRes, OldVal
+ // max: move BinOpRes, StoreVal
// movn BinOpRes, Incr, Scratch4, BinOpRes
- // min: move BinOpRes, OldVal
+ // min: move BinOpRes, StoreVal
// movz BinOpRes, Incr, Scratch4, BinOpRes
BuildMI(loopMBB, DL, TII->get(OR), BinOpRes)
- .addReg(OldVal)
+ .addReg(StoreVal)
.addReg(Mips::ZERO);
BuildMI(loopMBB, DL, TII->get(MOVIncr), BinOpRes)
.addReg(Incr)
@@ -586,23 +577,24 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// srl srlres,maskedoldval1,shiftamt
// sign_extend dest,srlres
- sinkMBB->addSuccessor(exitMBB, BranchProbability::getOne());
-
- BuildMI(sinkMBB, DL, TII->get(Mips::AND), Dest)
- .addReg(OldVal).addReg(Mask);
- BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest)
- .addReg(Dest).addReg(ShiftAmnt);
+ if (!DestOK) {
+ sinkMBB->addSuccessor(exitMBB, BranchProbability::getOne());
+ BuildMI(sinkMBB, DL, TII->get(Mips::AND), Dest).addReg(OldVal).addReg(Mask);
+ BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest)
+ .addReg(Dest)
+ .addReg(ShiftAmnt);
- if (STI->hasMips32r2()) {
- BuildMI(sinkMBB, DL, TII->get(SEOp), Dest).addReg(Dest);
- } else {
- const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
- BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest)
- .addReg(Dest, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest)
- .addReg(Dest, RegState::Kill)
- .addImm(ShiftImm);
+ if (STI->hasMips32r2()) {
+ BuildMI(sinkMBB, DL, TII->get(SEOp), Dest).addReg(Dest);
+ } else {
+ const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
+ BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest)
+ .addReg(Dest, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(sinkMBB, DL, TII->get(Mips::SRA), Dest)
+ .addReg(Dest, RegState::Kill)
+ .addImm(ShiftImm);
+ }
}
LivePhysRegs LiveRegs;
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index a96581bdb39a4c..2f07d70808c16a 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -912,8 +912,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: $BB4_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: slt $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: seh $4, $4
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: slt $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movn $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -922,9 +926,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: beqz $4, $BB4_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -952,8 +954,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: $BB4_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: slt $5, $2, $7
-; MIPSR6-NEXT: seleqz $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: seh $4, $4
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: slt $5, $4, $7
+; MIPSR6-NEXT: seleqz $3, $4, $5
; MIPSR6-NEXT: selnez $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -961,10 +967,9 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB4_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -991,8 +996,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: $BB4_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: slt $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: seh $4, $4
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: slt $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movn $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -1000,9 +1009,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB4_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -1029,8 +1036,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: $BB4_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: slt $5, $2, $7
-; MMR6-NEXT: seleqz $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: seh $4, $4
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: slt $5, $4, $7
+; MMR6-NEXT: seleqz $3, $4, $5
; MMR6-NEXT: selnez $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -1039,9 +1050,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB4_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -1067,14 +1076,13 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB4_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: srav $2, $2, $10
-; MIPS32-NEXT: srav $7, $7, $10
-; MIPS32-NEXT: sll $2, $2, 16
-; MIPS32-NEXT: sra $2, $2, 16
-; MIPS32-NEXT: sll $7, $7, 16
-; MIPS32-NEXT: sra $7, $7, 16
-; MIPS32-NEXT: slt $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 16
+; MIPS32-NEXT: sra $4, $4, 16
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: slt $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movn $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -1083,10 +1091,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: beqz $4, $BB4_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -1095,7 +1100,6 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: addiu $sp, $sp, 8
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
-
;
; MIPSEL-LABEL: test_max_16:
; MIPSEL: # %bb.0: # %entry
@@ -1114,12 +1118,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB4_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: srav $2, $2, $10
-; MIPSEL-NEXT: srav $7, $7, $10
-; MIPSEL-NEXT: seh $2, $2
-; MIPSEL-NEXT: seh $7, $7
-; MIPSEL-NEXT: slt $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: seh $4, $4
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: slt $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movn $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -1128,9 +1132,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB4_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -1157,12 +1159,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB4_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: srav $2, $2, $10
-; MIPSELR6-NEXT: srav $7, $7, $10
-; MIPSELR6-NEXT: seh $2, $2
-; MIPSELR6-NEXT: seh $7, $7
-; MIPSELR6-NEXT: slt $5, $2, $7
-; MIPSELR6-NEXT: seleqz $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: seh $4, $4
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: slt $5, $4, $7
+; MIPSELR6-NEXT: seleqz $3, $4, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -1170,10 +1172,9 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB4_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -1199,12 +1200,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB4_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: srav $2, $2, $10
-; MMEL-NEXT: srav $7, $7, $10
-; MMEL-NEXT: seh $2, $2
-; MMEL-NEXT: seh $7, $7
-; MMEL-NEXT: slt $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: seh $4, $4
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: slt $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movn $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -1212,9 +1213,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB4_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -1240,12 +1239,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB4_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: srav $2, $2, $10
-; MMELR6-NEXT: srav $7, $7, $10
-; MMELR6-NEXT: seh $2, $2
-; MMELR6-NEXT: seh $7, $7
-; MMELR6-NEXT: slt $5, $2, $7
-; MMELR6-NEXT: seleqz $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: seh $4, $4
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: slt $5, $4, $7
+; MMELR6-NEXT: seleqz $3, $4, $5
; MMELR6-NEXT: selnez $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -1254,9 +1253,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB4_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -1283,8 +1280,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: .LBB4_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: slt $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: seh $4, $4
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: slt $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movn $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -1293,9 +1294,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB4_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -1323,8 +1322,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: .LBB4_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: slt $5, $2, $7
-; MIPS64R6-NEXT: seleqz $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: seh $4, $4
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: slt $5, $4, $7
+; MIPS64R6-NEXT: seleqz $3, $4, $5
; MIPS64R6-NEXT: selnez $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -1332,10 +1335,9 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB4_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -1361,12 +1363,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB4_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: srav $2, $2, $10
-; MIPS64EL-NEXT: srav $7, $7, $10
-; MIPS64EL-NEXT: seh $2, $2
-; MIPS64EL-NEXT: seh $7, $7
-; MIPS64EL-NEXT: slt $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: seh $4, $4
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: slt $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movn $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -1375,9 +1377,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB4_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -1404,12 +1404,12 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB4_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: srav $2, $2, $10
-; MIPS64ELR6-NEXT: srav $7, $7, $10
-; MIPS64ELR6-NEXT: seh $2, $2
-; MIPS64ELR6-NEXT: seh $7, $7
-; MIPS64ELR6-NEXT: slt $5, $2, $7
-; MIPS64ELR6-NEXT: seleqz $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: seh $4, $4
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: slt $5, $4, $7
+; MIPS64ELR6-NEXT: seleqz $3, $4, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -1417,10 +1417,9 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB4_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -1428,6 +1427,7 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: sync
; MIPS64ELR6-NEXT: daddiu $sp, $sp, 16
; MIPS64ELR6-NEXT: jrc $ra
+
entry:
%0 = atomicrmw max ptr %ptr, i16 %val seq_cst
ret i16 %0
@@ -1452,8 +1452,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: $BB5_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: slt $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: seh $4, $4
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: slt $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movz $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -1462,9 +1466,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: beqz $4, $BB5_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -1492,8 +1494,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: $BB5_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: slt $5, $2, $7
-; MIPSR6-NEXT: selnez $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: seh $4, $4
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: slt $5, $4, $7
+; MIPSR6-NEXT: selnez $3, $4, $5
; MIPSR6-NEXT: seleqz $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -1501,10 +1507,9 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB5_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -1531,8 +1536,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: $BB5_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: slt $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: seh $4, $4
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: slt $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movz $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -1540,9 +1549,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB5_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -1569,8 +1576,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: $BB5_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: slt $5, $2, $7
-; MMR6-NEXT: selnez $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: seh $4, $4
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: slt $5, $4, $7
+; MMR6-NEXT: selnez $3, $4, $5
; MMR6-NEXT: seleqz $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -1579,9 +1590,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB5_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -1607,14 +1616,13 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB5_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: srav $2, $2, $10
-; MIPS32-NEXT: srav $7, $7, $10
-; MIPS32-NEXT: sll $2, $2, 16
-; MIPS32-NEXT: sra $2, $2, 16
-; MIPS32-NEXT: sll $7, $7, 16
-; MIPS32-NEXT: sra $7, $7, 16
-; MIPS32-NEXT: slt $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 16
+; MIPS32-NEXT: sra $4, $4, 16
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: slt $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movz $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -1623,10 +1631,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: beqz $4, $BB5_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -1653,12 +1658,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB5_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: srav $2, $2, $10
-; MIPSEL-NEXT: srav $7, $7, $10
-; MIPSEL-NEXT: seh $2, $2
-; MIPSEL-NEXT: seh $7, $7
-; MIPSEL-NEXT: slt $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: seh $4, $4
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: slt $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movz $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -1667,9 +1672,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB5_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -1696,12 +1699,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB5_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: srav $2, $2, $10
-; MIPSELR6-NEXT: srav $7, $7, $10
-; MIPSELR6-NEXT: seh $2, $2
-; MIPSELR6-NEXT: seh $7, $7
-; MIPSELR6-NEXT: slt $5, $2, $7
-; MIPSELR6-NEXT: selnez $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: seh $4, $4
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: slt $5, $4, $7
+; MIPSELR6-NEXT: selnez $3, $4, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -1709,10 +1712,9 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB5_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -1738,12 +1740,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB5_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: srav $2, $2, $10
-; MMEL-NEXT: srav $7, $7, $10
-; MMEL-NEXT: seh $2, $2
-; MMEL-NEXT: seh $7, $7
-; MMEL-NEXT: slt $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: seh $4, $4
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: slt $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movz $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -1751,9 +1753,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB5_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -1779,12 +1779,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB5_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: srav $2, $2, $10
-; MMELR6-NEXT: srav $7, $7, $10
-; MMELR6-NEXT: seh $2, $2
-; MMELR6-NEXT: seh $7, $7
-; MMELR6-NEXT: slt $5, $2, $7
-; MMELR6-NEXT: selnez $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: seh $4, $4
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: slt $5, $4, $7
+; MMELR6-NEXT: selnez $3, $4, $5
; MMELR6-NEXT: seleqz $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -1793,9 +1793,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB5_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -1822,8 +1820,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: .LBB5_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: slt $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: seh $4, $4
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: slt $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movz $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -1832,9 +1834,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB5_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -1862,8 +1862,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: .LBB5_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: slt $5, $2, $7
-; MIPS64R6-NEXT: selnez $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: seh $4, $4
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: slt $5, $4, $7
+; MIPS64R6-NEXT: selnez $3, $4, $5
; MIPS64R6-NEXT: seleqz $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -1871,10 +1875,9 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB5_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -1900,12 +1903,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB5_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: srav $2, $2, $10
-; MIPS64EL-NEXT: srav $7, $7, $10
-; MIPS64EL-NEXT: seh $2, $2
-; MIPS64EL-NEXT: seh $7, $7
-; MIPS64EL-NEXT: slt $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: seh $4, $4
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: slt $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movz $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -1914,9 +1917,7 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB5_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -1943,12 +1944,12 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB5_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: srav $2, $2, $10
-; MIPS64ELR6-NEXT: srav $7, $7, $10
-; MIPS64ELR6-NEXT: seh $2, $2
-; MIPS64ELR6-NEXT: seh $7, $7
-; MIPS64ELR6-NEXT: slt $5, $2, $7
-; MIPS64ELR6-NEXT: selnez $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: seh $4, $4
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: slt $5, $4, $7
+; MIPS64ELR6-NEXT: selnez $3, $4, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -1956,10 +1957,9 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB5_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -1991,8 +1991,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: $BB6_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: sltu $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: andi $4, $4, 65535
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: sltu $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movn $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -2001,9 +2005,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: beqz $4, $BB6_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -2031,8 +2033,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: $BB6_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: sltu $5, $2, $7
-; MIPSR6-NEXT: seleqz $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: andi $4, $4, 65535
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: sltu $5, $4, $7
+; MIPSR6-NEXT: seleqz $3, $4, $5
; MIPSR6-NEXT: selnez $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -2040,10 +2046,9 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB6_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -2070,8 +2075,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: $BB6_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: sltu $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: andi $4, $4, 65535
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: sltu $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movn $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -2079,9 +2088,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB6_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -2108,8 +2115,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: $BB6_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: sltu $5, $2, $7
-; MMR6-NEXT: seleqz $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: andi $4, $4, 65535
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: sltu $5, $4, $7
+; MMR6-NEXT: seleqz $3, $4, $5
; MMR6-NEXT: selnez $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -2118,9 +2129,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB6_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -2146,10 +2155,13 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB6_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: and $2, $2, $8
-; MIPS32-NEXT: and $7, $7, $8
-; MIPS32-NEXT: sltu $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 16
+; MIPS32-NEXT: srl $4, $4, 16
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: sltu $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movn $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -2158,10 +2170,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: beqz $4, $BB6_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -2188,10 +2197,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB6_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
-; MIPSEL-NEXT: sltu $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: andi $4, $4, 65535
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: sltu $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movn $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -2200,9 +2211,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB6_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -2229,10 +2238,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB6_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
-; MIPSELR6-NEXT: sltu $5, $2, $7
-; MIPSELR6-NEXT: seleqz $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: andi $4, $4, 65535
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: sltu $5, $4, $7
+; MIPSELR6-NEXT: seleqz $3, $4, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -2240,10 +2251,9 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB6_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -2269,10 +2279,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB6_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
-; MMEL-NEXT: sltu $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: andi $4, $4, 65535
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: sltu $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movn $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -2280,9 +2292,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB6_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -2308,10 +2318,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB6_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
-; MMELR6-NEXT: sltu $5, $2, $7
-; MMELR6-NEXT: seleqz $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: andi $4, $4, 65535
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: sltu $5, $4, $7
+; MMELR6-NEXT: seleqz $3, $4, $5
; MMELR6-NEXT: selnez $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -2320,9 +2332,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB6_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -2349,8 +2359,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: .LBB6_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: sltu $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: andi $4, $4, 65535
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: sltu $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movn $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -2359,9 +2373,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB6_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -2389,8 +2401,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: .LBB6_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: sltu $5, $2, $7
-; MIPS64R6-NEXT: seleqz $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: andi $4, $4, 65535
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: sltu $5, $4, $7
+; MIPS64R6-NEXT: seleqz $3, $4, $5
; MIPS64R6-NEXT: selnez $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -2398,10 +2414,9 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB6_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -2427,10 +2442,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB6_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
-; MIPS64EL-NEXT: sltu $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: andi $4, $4, 65535
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: sltu $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movn $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -2439,9 +2456,7 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB6_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -2468,10 +2483,12 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB6_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
-; MIPS64ELR6-NEXT: sltu $5, $2, $7
-; MIPS64ELR6-NEXT: seleqz $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: andi $4, $4, 65535
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: sltu $5, $4, $7
+; MIPS64ELR6-NEXT: seleqz $3, $4, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -2479,10 +2496,9 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB6_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -2514,8 +2530,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: $BB7_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: sltu $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: andi $4, $4, 65535
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: sltu $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movz $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -2524,9 +2544,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS-NEXT: beqz $4, $BB7_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -2554,8 +2572,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: $BB7_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: sltu $5, $2, $7
-; MIPSR6-NEXT: selnez $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: andi $4, $4, 65535
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: sltu $5, $4, $7
+; MIPSR6-NEXT: selnez $3, $4, $5
; MIPSR6-NEXT: seleqz $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -2563,10 +2585,9 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB7_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -2593,8 +2614,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: $BB7_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: sltu $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: andi $4, $4, 65535
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: sltu $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movz $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -2602,9 +2627,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB7_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -2631,8 +2654,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: $BB7_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: sltu $5, $2, $7
-; MMR6-NEXT: selnez $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: andi $4, $4, 65535
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: sltu $5, $4, $7
+; MMR6-NEXT: selnez $3, $4, $5
; MMR6-NEXT: seleqz $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -2641,9 +2668,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB7_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -2669,10 +2694,13 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB7_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: and $2, $2, $8
-; MIPS32-NEXT: and $7, $7, $8
-; MIPS32-NEXT: sltu $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 16
+; MIPS32-NEXT: srl $4, $4, 16
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: sltu $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movz $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -2681,10 +2709,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: beqz $4, $BB7_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -2694,7 +2719,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
;
-;
; MIPSEL-LABEL: test_umin_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2712,10 +2736,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB7_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
-; MIPSEL-NEXT: sltu $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: andi $4, $4, 65535
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: sltu $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movz $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -2724,9 +2750,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB7_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -2753,10 +2777,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB7_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
-; MIPSELR6-NEXT: sltu $5, $2, $7
-; MIPSELR6-NEXT: selnez $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: andi $4, $4, 65535
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: sltu $5, $4, $7
+; MIPSELR6-NEXT: selnez $3, $4, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -2764,10 +2790,9 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB7_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -2793,10 +2818,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB7_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
-; MMEL-NEXT: sltu $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: andi $4, $4, 65535
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: sltu $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movz $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -2804,9 +2831,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB7_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -2832,10 +2857,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB7_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
-; MMELR6-NEXT: sltu $5, $2, $7
-; MMELR6-NEXT: selnez $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: andi $4, $4, 65535
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: sltu $5, $4, $7
+; MMELR6-NEXT: selnez $3, $4, $5
; MMELR6-NEXT: seleqz $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -2844,9 +2871,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB7_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -2873,8 +2898,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: .LBB7_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: sltu $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: andi $4, $4, 65535
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: sltu $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movz $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -2883,9 +2912,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB7_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -2913,8 +2940,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: .LBB7_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: sltu $5, $2, $7
-; MIPS64R6-NEXT: selnez $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: andi $4, $4, 65535
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: sltu $5, $4, $7
+; MIPS64R6-NEXT: selnez $3, $4, $5
; MIPS64R6-NEXT: seleqz $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -2922,10 +2953,9 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB7_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -2951,10 +2981,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB7_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
-; MIPS64EL-NEXT: sltu $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: andi $4, $4, 65535
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: sltu $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movz $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -2963,9 +2995,7 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB7_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -2992,10 +3022,12 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB7_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
-; MIPS64ELR6-NEXT: sltu $5, $2, $7
-; MIPS64ELR6-NEXT: selnez $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: andi $4, $4, 65535
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: sltu $5, $4, $7
+; MIPS64ELR6-NEXT: selnez $3, $4, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -3003,10 +3035,9 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB7_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3039,8 +3070,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: $BB8_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: slt $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: seb $4, $4
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: slt $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movn $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -3049,9 +3084,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: beqz $4, $BB8_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seb $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -3079,8 +3112,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: $BB8_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: slt $5, $2, $7
-; MIPSR6-NEXT: seleqz $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: seb $4, $4
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: slt $5, $4, $7
+; MIPSR6-NEXT: seleqz $3, $4, $5
; MIPSR6-NEXT: selnez $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -3088,10 +3125,9 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB8_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seb $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -3118,8 +3154,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: $BB8_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: slt $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: seb $4, $4
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: slt $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movn $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -3127,9 +3167,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB8_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seb $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -3156,8 +3194,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: $BB8_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: slt $5, $2, $7
-; MMR6-NEXT: seleqz $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: seb $4, $4
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: slt $5, $4, $7
+; MMR6-NEXT: seleqz $3, $4, $5
; MMR6-NEXT: selnez $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -3166,9 +3208,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB8_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seb $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -3194,14 +3234,13 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB8_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: srav $2, $2, $10
-; MIPS32-NEXT: srav $7, $7, $10
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
-; MIPS32-NEXT: sll $7, $7, 24
-; MIPS32-NEXT: sra $7, $7, 24
-; MIPS32-NEXT: slt $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 24
+; MIPS32-NEXT: sra $4, $4, 24
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: slt $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movn $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -3210,10 +3249,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: beqz $4, $BB8_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 24
-; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -3240,12 +3276,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB8_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: srav $2, $2, $10
-; MIPSEL-NEXT: srav $7, $7, $10
-; MIPSEL-NEXT: seb $2, $2
-; MIPSEL-NEXT: seb $7, $7
-; MIPSEL-NEXT: slt $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: seb $4, $4
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: slt $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movn $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -3254,9 +3290,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB8_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seb $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -3283,12 +3317,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB8_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: srav $2, $2, $10
-; MIPSELR6-NEXT: srav $7, $7, $10
-; MIPSELR6-NEXT: seb $2, $2
-; MIPSELR6-NEXT: seb $7, $7
-; MIPSELR6-NEXT: slt $5, $2, $7
-; MIPSELR6-NEXT: seleqz $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: seb $4, $4
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: slt $5, $4, $7
+; MIPSELR6-NEXT: seleqz $3, $4, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -3296,10 +3330,9 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB8_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seb $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3325,12 +3358,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB8_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: srav $2, $2, $10
-; MMEL-NEXT: srav $7, $7, $10
-; MMEL-NEXT: seb $2, $2
-; MMEL-NEXT: seb $7, $7
-; MMEL-NEXT: slt $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: seb $4, $4
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: slt $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movn $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -3338,9 +3371,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB8_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seb $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3366,12 +3397,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB8_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: srav $2, $2, $10
-; MMELR6-NEXT: srav $7, $7, $10
-; MMELR6-NEXT: seb $2, $2
-; MMELR6-NEXT: seb $7, $7
-; MMELR6-NEXT: slt $5, $2, $7
-; MMELR6-NEXT: seleqz $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: seb $4, $4
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: slt $5, $4, $7
+; MMELR6-NEXT: seleqz $3, $4, $5
; MMELR6-NEXT: selnez $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -3380,9 +3411,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB8_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seb $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3409,8 +3438,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: .LBB8_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: slt $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: seb $4, $4
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: slt $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movn $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -3419,9 +3452,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB8_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seb $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3449,8 +3480,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: .LBB8_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: slt $5, $2, $7
-; MIPS64R6-NEXT: seleqz $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: seb $4, $4
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: slt $5, $4, $7
+; MIPS64R6-NEXT: seleqz $3, $4, $5
; MIPS64R6-NEXT: selnez $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -3458,10 +3493,9 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB8_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seb $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -3487,12 +3521,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB8_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: srav $2, $2, $10
-; MIPS64EL-NEXT: srav $7, $7, $10
-; MIPS64EL-NEXT: seb $2, $2
-; MIPS64EL-NEXT: seb $7, $7
-; MIPS64EL-NEXT: slt $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: seb $4, $4
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: slt $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movn $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -3501,9 +3535,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB8_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seb $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -3530,12 +3562,12 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB8_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: srav $2, $2, $10
-; MIPS64ELR6-NEXT: srav $7, $7, $10
-; MIPS64ELR6-NEXT: seb $2, $2
-; MIPS64ELR6-NEXT: seb $7, $7
-; MIPS64ELR6-NEXT: slt $5, $2, $7
-; MIPS64ELR6-NEXT: seleqz $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: seb $4, $4
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: slt $5, $4, $7
+; MIPS64ELR6-NEXT: seleqz $3, $4, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -3543,10 +3575,9 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB8_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seb $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3578,8 +3609,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: $BB9_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: slt $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: seb $4, $4
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: slt $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movz $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -3588,9 +3623,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: beqz $4, $BB9_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seb $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -3618,8 +3651,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: $BB9_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: slt $5, $2, $7
-; MIPSR6-NEXT: selnez $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: seb $4, $4
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: slt $5, $4, $7
+; MIPSR6-NEXT: selnez $3, $4, $5
; MIPSR6-NEXT: seleqz $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -3627,10 +3664,9 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB9_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seb $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -3657,8 +3693,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: $BB9_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: slt $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: seb $4, $4
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: slt $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movz $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -3666,9 +3706,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB9_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seb $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -3695,8 +3733,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: $BB9_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: slt $5, $2, $7
-; MMR6-NEXT: selnez $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: seb $4, $4
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: slt $5, $4, $7
+; MMR6-NEXT: selnez $3, $4, $5
; MMR6-NEXT: seleqz $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -3705,9 +3747,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB9_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seb $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -3733,14 +3773,13 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB9_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: srav $2, $2, $10
-; MIPS32-NEXT: srav $7, $7, $10
-; MIPS32-NEXT: sll $2, $2, 24
-; MIPS32-NEXT: sra $2, $2, 24
-; MIPS32-NEXT: sll $7, $7, 24
-; MIPS32-NEXT: sra $7, $7, 24
-; MIPS32-NEXT: slt $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 24
+; MIPS32-NEXT: sra $4, $4, 24
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: slt $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movz $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -3749,10 +3788,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: beqz $4, $BB9_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 24
-; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -3779,12 +3815,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB9_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: srav $2, $2, $10
-; MIPSEL-NEXT: srav $7, $7, $10
-; MIPSEL-NEXT: seb $2, $2
-; MIPSEL-NEXT: seb $7, $7
-; MIPSEL-NEXT: slt $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: seb $4, $4
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: slt $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movz $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -3793,9 +3829,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB9_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seb $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -3822,12 +3856,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB9_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: srav $2, $2, $10
-; MIPSELR6-NEXT: srav $7, $7, $10
-; MIPSELR6-NEXT: seb $2, $2
-; MIPSELR6-NEXT: seb $7, $7
-; MIPSELR6-NEXT: slt $5, $2, $7
-; MIPSELR6-NEXT: selnez $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: seb $4, $4
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: slt $5, $4, $7
+; MIPSELR6-NEXT: selnez $3, $4, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -3835,10 +3869,9 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB9_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seb $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3864,12 +3897,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB9_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: srav $2, $2, $10
-; MMEL-NEXT: srav $7, $7, $10
-; MMEL-NEXT: seb $2, $2
-; MMEL-NEXT: seb $7, $7
-; MMEL-NEXT: slt $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: seb $4, $4
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: slt $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movz $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -3877,9 +3910,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB9_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seb $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3905,12 +3936,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB9_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: srav $2, $2, $10
-; MMELR6-NEXT: srav $7, $7, $10
-; MMELR6-NEXT: seb $2, $2
-; MMELR6-NEXT: seb $7, $7
-; MMELR6-NEXT: slt $5, $2, $7
-; MMELR6-NEXT: selnez $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: seb $4, $4
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: slt $5, $4, $7
+; MMELR6-NEXT: selnez $3, $4, $5
; MMELR6-NEXT: seleqz $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -3919,9 +3950,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB9_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seb $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3948,8 +3977,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: .LBB9_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: slt $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: seb $4, $4
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: slt $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movz $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -3958,9 +3991,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB9_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seb $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3988,8 +4019,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: .LBB9_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: slt $5, $2, $7
-; MIPS64R6-NEXT: selnez $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: seb $4, $4
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: slt $5, $4, $7
+; MIPS64R6-NEXT: selnez $3, $4, $5
; MIPS64R6-NEXT: seleqz $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -3997,10 +4032,9 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB9_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seb $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -4026,12 +4060,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB9_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: srav $2, $2, $10
-; MIPS64EL-NEXT: srav $7, $7, $10
-; MIPS64EL-NEXT: seb $2, $2
-; MIPS64EL-NEXT: seb $7, $7
-; MIPS64EL-NEXT: slt $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: seb $4, $4
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: slt $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movz $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -4040,9 +4074,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB9_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seb $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -4069,12 +4101,12 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB9_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: srav $2, $2, $10
-; MIPS64ELR6-NEXT: srav $7, $7, $10
-; MIPS64ELR6-NEXT: seb $2, $2
-; MIPS64ELR6-NEXT: seb $7, $7
-; MIPS64ELR6-NEXT: slt $5, $2, $7
-; MIPS64ELR6-NEXT: selnez $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: seb $4, $4
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: slt $5, $4, $7
+; MIPS64ELR6-NEXT: selnez $3, $4, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -4082,10 +4114,9 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB9_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seb $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -4117,8 +4148,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: $BB10_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: sltu $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: andi $4, $4, 255
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: sltu $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movn $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -4127,9 +4162,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: beqz $4, $BB10_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -4157,8 +4190,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: $BB10_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: sltu $5, $2, $7
-; MIPSR6-NEXT: seleqz $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: andi $4, $4, 255
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: sltu $5, $4, $7
+; MIPSR6-NEXT: seleqz $3, $4, $5
; MIPSR6-NEXT: selnez $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -4166,10 +4203,9 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB10_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -4196,8 +4232,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: $BB10_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: sltu $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: andi $4, $4, 255
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: sltu $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movn $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -4205,9 +4245,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB10_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -4234,8 +4272,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: $BB10_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: sltu $5, $2, $7
-; MMR6-NEXT: seleqz $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: andi $4, $4, 255
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: sltu $5, $4, $7
+; MMR6-NEXT: seleqz $3, $4, $5
; MMR6-NEXT: selnez $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -4244,9 +4286,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB10_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -4272,10 +4312,13 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB10_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: and $2, $2, $8
-; MIPS32-NEXT: and $7, $7, $8
-; MIPS32-NEXT: sltu $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 24
+; MIPS32-NEXT: srl $4, $4, 24
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: sltu $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movn $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -4284,10 +4327,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: beqz $4, $BB10_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -4314,10 +4354,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB10_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
-; MIPSEL-NEXT: sltu $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: andi $4, $4, 255
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: sltu $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movn $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -4326,9 +4368,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB10_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -4355,10 +4395,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB10_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
-; MIPSELR6-NEXT: sltu $5, $2, $7
-; MIPSELR6-NEXT: seleqz $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: andi $4, $4, 255
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: sltu $5, $4, $7
+; MIPSELR6-NEXT: seleqz $3, $4, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -4366,10 +4408,9 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB10_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -4395,10 +4436,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB10_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
-; MMEL-NEXT: sltu $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: andi $4, $4, 255
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: sltu $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movn $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -4406,9 +4449,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB10_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -4434,10 +4475,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB10_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
-; MMELR6-NEXT: sltu $5, $2, $7
-; MMELR6-NEXT: seleqz $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: andi $4, $4, 255
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: sltu $5, $4, $7
+; MMELR6-NEXT: seleqz $3, $4, $5
; MMELR6-NEXT: selnez $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -4446,9 +4489,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB10_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -4475,8 +4516,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: .LBB10_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: sltu $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: andi $4, $4, 255
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: sltu $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movn $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -4485,9 +4530,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB10_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -4515,8 +4558,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: .LBB10_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: sltu $5, $2, $7
-; MIPS64R6-NEXT: seleqz $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: andi $4, $4, 255
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: sltu $5, $4, $7
+; MIPS64R6-NEXT: seleqz $3, $4, $5
; MIPS64R6-NEXT: selnez $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -4524,10 +4571,9 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB10_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -4553,10 +4599,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB10_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
-; MIPS64EL-NEXT: sltu $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: andi $4, $4, 255
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: sltu $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movn $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -4565,9 +4613,7 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB10_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -4594,10 +4640,12 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB10_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
-; MIPS64ELR6-NEXT: sltu $5, $2, $7
-; MIPS64ELR6-NEXT: seleqz $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: andi $4, $4, 255
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: sltu $5, $4, $7
+; MIPS64ELR6-NEXT: seleqz $3, $4, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -4605,10 +4653,9 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB10_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -4640,8 +4687,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: $BB11_1: # %entry
; MIPS-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS-NEXT: ll $2, 0($6)
-; MIPS-NEXT: sltu $5, $2, $7
-; MIPS-NEXT: move $3, $2
+; MIPS-NEXT: srav $4, $2, $10
+; MIPS-NEXT: andi $4, $4, 255
+; MIPS-NEXT: or $1, $zero, $4
+; MIPS-NEXT: sllv $4, $4, $10
+; MIPS-NEXT: sltu $5, $4, $7
+; MIPS-NEXT: move $3, $4
; MIPS-NEXT: movz $3, $7, $5
; MIPS-NEXT: and $3, $3, $8
; MIPS-NEXT: and $4, $2, $9
@@ -4650,9 +4701,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: beqz $4, $BB11_1
; MIPS-NEXT: nop
; MIPS-NEXT: # %bb.2: # %entry
-; MIPS-NEXT: and $1, $2, $8
-; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: .insn
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -4680,8 +4729,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: $BB11_1: # %entry
; MIPSR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSR6-NEXT: ll $2, 0($6)
-; MIPSR6-NEXT: sltu $5, $2, $7
-; MIPSR6-NEXT: selnez $3, $2, $5
+; MIPSR6-NEXT: srav $4, $2, $10
+; MIPSR6-NEXT: andi $4, $4, 255
+; MIPSR6-NEXT: or $1, $zero, $4
+; MIPSR6-NEXT: sllv $4, $4, $10
+; MIPSR6-NEXT: sltu $5, $4, $7
+; MIPSR6-NEXT: selnez $3, $4, $5
; MIPSR6-NEXT: seleqz $5, $7, $5
; MIPSR6-NEXT: or $3, $3, $5
; MIPSR6-NEXT: and $3, $3, $8
@@ -4689,10 +4742,9 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: or $4, $4, $3
; MIPSR6-NEXT: sc $4, 0($6)
; MIPSR6-NEXT: beqzc $4, $BB11_1
+; MIPSR6-NEXT: nop
; MIPSR6-NEXT: # %bb.2: # %entry
-; MIPSR6-NEXT: and $1, $2, $8
-; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: .insn
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -4719,8 +4771,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: $BB11_1: # %entry
; MM-NEXT: # =>This Inner Loop Header: Depth=1
; MM-NEXT: ll $2, 0($6)
-; MM-NEXT: sltu $5, $2, $7
-; MM-NEXT: or $3, $2, $zero
+; MM-NEXT: srav $4, $2, $10
+; MM-NEXT: andi $4, $4, 255
+; MM-NEXT: or $1, $zero, $4
+; MM-NEXT: sllv $4, $4, $10
+; MM-NEXT: sltu $5, $4, $7
+; MM-NEXT: or $3, $4, $zero
; MM-NEXT: movz $3, $7, $5
; MM-NEXT: and $3, $3, $8
; MM-NEXT: and $4, $2, $9
@@ -4728,9 +4784,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: sc $4, 0($6)
; MM-NEXT: beqzc $4, $BB11_1
; MM-NEXT: # %bb.2: # %entry
-; MM-NEXT: and $1, $2, $8
-; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: .insn
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -4757,8 +4811,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: $BB11_1: # %entry
; MMR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMR6-NEXT: ll $2, 0($6)
-; MMR6-NEXT: sltu $5, $2, $7
-; MMR6-NEXT: selnez $3, $2, $5
+; MMR6-NEXT: srav $4, $2, $10
+; MMR6-NEXT: andi $4, $4, 255
+; MMR6-NEXT: or $1, $zero, $4
+; MMR6-NEXT: sllv $4, $4, $10
+; MMR6-NEXT: sltu $5, $4, $7
+; MMR6-NEXT: selnez $3, $4, $5
; MMR6-NEXT: seleqz $5, $7, $5
; MMR6-NEXT: or $3, $3, $5
; MMR6-NEXT: and $3, $3, $8
@@ -4767,9 +4825,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: sc $4, 0($6)
; MMR6-NEXT: beqc $4, $zero, $BB11_1
; MMR6-NEXT: # %bb.2: # %entry
-; MMR6-NEXT: and $1, $2, $8
-; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: .insn
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -4795,10 +4851,13 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB11_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
-; MIPS32-NEXT: and $2, $2, $8
-; MIPS32-NEXT: and $7, $7, $8
-; MIPS32-NEXT: sltu $5, $2, $7
-; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: srav $4, $2, $10
+; MIPS32-NEXT: sll $4, $4, 24
+; MIPS32-NEXT: srl $4, $4, 24
+; MIPS32-NEXT: or $1, $zero, $4
+; MIPS32-NEXT: sllv $4, $4, $10
+; MIPS32-NEXT: sltu $5, $4, $7
+; MIPS32-NEXT: move $3, $4
; MIPS32-NEXT: movz $3, $7, $5
; MIPS32-NEXT: and $3, $3, $8
; MIPS32-NEXT: and $4, $2, $9
@@ -4807,10 +4866,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: beqz $4, $BB11_1
; MIPS32-NEXT: nop
; MIPS32-NEXT: # %bb.2: # %entry
-; MIPS32-NEXT: and $1, $2, $8
-; MIPS32-NEXT: srlv $1, $1, $10
-; MIPS32-NEXT: sll $1, $1, 16
-; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: .insn
; MIPS32-NEXT: # %bb.3: # %entry
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS32-NEXT: # %bb.4: # %entry
@@ -4837,10 +4893,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB11_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
-; MIPSEL-NEXT: sltu $5, $2, $7
-; MIPSEL-NEXT: move $3, $2
+; MIPSEL-NEXT: srav $4, $2, $10
+; MIPSEL-NEXT: andi $4, $4, 255
+; MIPSEL-NEXT: or $1, $zero, $4
+; MIPSEL-NEXT: sllv $4, $4, $10
+; MIPSEL-NEXT: sltu $5, $4, $7
+; MIPSEL-NEXT: move $3, $4
; MIPSEL-NEXT: movz $3, $7, $5
; MIPSEL-NEXT: and $3, $3, $8
; MIPSEL-NEXT: and $4, $2, $9
@@ -4849,9 +4907,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: beqz $4, $BB11_1
; MIPSEL-NEXT: nop
; MIPSEL-NEXT: # %bb.2: # %entry
-; MIPSEL-NEXT: and $1, $2, $8
-; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: .insn
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -4878,10 +4934,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB11_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
-; MIPSELR6-NEXT: sltu $5, $2, $7
-; MIPSELR6-NEXT: selnez $3, $2, $5
+; MIPSELR6-NEXT: srav $4, $2, $10
+; MIPSELR6-NEXT: andi $4, $4, 255
+; MIPSELR6-NEXT: or $1, $zero, $4
+; MIPSELR6-NEXT: sllv $4, $4, $10
+; MIPSELR6-NEXT: sltu $5, $4, $7
+; MIPSELR6-NEXT: selnez $3, $4, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
; MIPSELR6-NEXT: or $3, $3, $5
; MIPSELR6-NEXT: and $3, $3, $8
@@ -4889,10 +4947,9 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: or $4, $4, $3
; MIPSELR6-NEXT: sc $4, 0($6)
; MIPSELR6-NEXT: beqzc $4, $BB11_1
+; MIPSELR6-NEXT: nop
; MIPSELR6-NEXT: # %bb.2: # %entry
-; MIPSELR6-NEXT: and $1, $2, $8
-; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: .insn
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -4918,10 +4975,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB11_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
-; MMEL-NEXT: sltu $5, $2, $7
-; MMEL-NEXT: or $3, $2, $zero
+; MMEL-NEXT: srav $4, $2, $10
+; MMEL-NEXT: andi $4, $4, 255
+; MMEL-NEXT: or $1, $zero, $4
+; MMEL-NEXT: sllv $4, $4, $10
+; MMEL-NEXT: sltu $5, $4, $7
+; MMEL-NEXT: or $3, $4, $zero
; MMEL-NEXT: movz $3, $7, $5
; MMEL-NEXT: and $3, $3, $8
; MMEL-NEXT: and $4, $2, $9
@@ -4929,9 +4988,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: sc $4, 0($6)
; MMEL-NEXT: beqzc $4, $BB11_1
; MMEL-NEXT: # %bb.2: # %entry
-; MMEL-NEXT: and $1, $2, $8
-; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: .insn
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -4957,10 +5014,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB11_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
-; MMELR6-NEXT: sltu $5, $2, $7
-; MMELR6-NEXT: selnez $3, $2, $5
+; MMELR6-NEXT: srav $4, $2, $10
+; MMELR6-NEXT: andi $4, $4, 255
+; MMELR6-NEXT: or $1, $zero, $4
+; MMELR6-NEXT: sllv $4, $4, $10
+; MMELR6-NEXT: sltu $5, $4, $7
+; MMELR6-NEXT: selnez $3, $4, $5
; MMELR6-NEXT: seleqz $5, $7, $5
; MMELR6-NEXT: or $3, $3, $5
; MMELR6-NEXT: and $3, $3, $8
@@ -4969,9 +5028,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: sc $4, 0($6)
; MMELR6-NEXT: beqc $4, $zero, $BB11_1
; MMELR6-NEXT: # %bb.2: # %entry
-; MMELR6-NEXT: and $1, $2, $8
-; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: .insn
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -4998,8 +5055,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: .LBB11_1: # %entry
; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64-NEXT: ll $2, 0($6)
-; MIPS64-NEXT: sltu $5, $2, $7
-; MIPS64-NEXT: move $3, $2
+; MIPS64-NEXT: srav $4, $2, $10
+; MIPS64-NEXT: andi $4, $4, 255
+; MIPS64-NEXT: or $1, $zero, $4
+; MIPS64-NEXT: sllv $4, $4, $10
+; MIPS64-NEXT: sltu $5, $4, $7
+; MIPS64-NEXT: move $3, $4
; MIPS64-NEXT: movz $3, $7, $5
; MIPS64-NEXT: and $3, $3, $8
; MIPS64-NEXT: and $4, $2, $9
@@ -5008,9 +5069,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: beqz $4, .LBB11_1
; MIPS64-NEXT: nop
; MIPS64-NEXT: # %bb.2: # %entry
-; MIPS64-NEXT: and $1, $2, $8
-; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: .insn
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -5038,8 +5097,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: .LBB11_1: # %entry
; MIPS64R6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64R6-NEXT: ll $2, 0($6)
-; MIPS64R6-NEXT: sltu $5, $2, $7
-; MIPS64R6-NEXT: selnez $3, $2, $5
+; MIPS64R6-NEXT: srav $4, $2, $10
+; MIPS64R6-NEXT: andi $4, $4, 255
+; MIPS64R6-NEXT: or $1, $zero, $4
+; MIPS64R6-NEXT: sllv $4, $4, $10
+; MIPS64R6-NEXT: sltu $5, $4, $7
+; MIPS64R6-NEXT: selnez $3, $4, $5
; MIPS64R6-NEXT: seleqz $5, $7, $5
; MIPS64R6-NEXT: or $3, $3, $5
; MIPS64R6-NEXT: and $3, $3, $8
@@ -5047,10 +5110,9 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: or $4, $4, $3
; MIPS64R6-NEXT: sc $4, 0($6)
; MIPS64R6-NEXT: beqzc $4, .LBB11_1
+; MIPS64R6-NEXT: nop
; MIPS64R6-NEXT: # %bb.2: # %entry
-; MIPS64R6-NEXT: and $1, $2, $8
-; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: .insn
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -5076,10 +5138,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB11_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
-; MIPS64EL-NEXT: sltu $5, $2, $7
-; MIPS64EL-NEXT: move $3, $2
+; MIPS64EL-NEXT: srav $4, $2, $10
+; MIPS64EL-NEXT: andi $4, $4, 255
+; MIPS64EL-NEXT: or $1, $zero, $4
+; MIPS64EL-NEXT: sllv $4, $4, $10
+; MIPS64EL-NEXT: sltu $5, $4, $7
+; MIPS64EL-NEXT: move $3, $4
; MIPS64EL-NEXT: movz $3, $7, $5
; MIPS64EL-NEXT: and $3, $3, $8
; MIPS64EL-NEXT: and $4, $2, $9
@@ -5088,9 +5152,7 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: beqz $4, .LBB11_1
; MIPS64EL-NEXT: nop
; MIPS64EL-NEXT: # %bb.2: # %entry
-; MIPS64EL-NEXT: and $1, $2, $8
-; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: .insn
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -5117,10 +5179,12 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB11_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
-; MIPS64ELR6-NEXT: sltu $5, $2, $7
-; MIPS64ELR6-NEXT: selnez $3, $2, $5
+; MIPS64ELR6-NEXT: srav $4, $2, $10
+; MIPS64ELR6-NEXT: andi $4, $4, 255
+; MIPS64ELR6-NEXT: or $1, $zero, $4
+; MIPS64ELR6-NEXT: sllv $4, $4, $10
+; MIPS64ELR6-NEXT: sltu $5, $4, $7
+; MIPS64ELR6-NEXT: selnez $3, $4, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
; MIPS64ELR6-NEXT: or $3, $3, $5
; MIPS64ELR6-NEXT: and $3, $3, $8
@@ -5128,10 +5192,9 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: or $4, $4, $3
; MIPS64ELR6-NEXT: sc $4, 0($6)
; MIPS64ELR6-NEXT: beqzc $4, .LBB11_1
+; MIPS64ELR6-NEXT: nop
; MIPS64ELR6-NEXT: # %bb.2: # %entry
-; MIPS64ELR6-NEXT: and $1, $2, $8
-; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: .insn
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
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