[llvm] [MIPS] Sign-extend subwords when expanding atomic max/min (PR #89246)

via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 21 20:16:25 PDT 2024


yingopq wrote:

> > > [syq-89246.patch](https://github.com/llvm/llvm-project/files/15048858/syq-89246.patch)
> > > @jdmitrovic-syrmia I figure out a patch. I have some test on both big-endian and little endian. can you have a review?
> > 
> > 
> > The slt instruction requires both parameters to be sign extended.
> 
> Sure. So I sign-extend the `StoreVal`. And `Incr` has been sign-extend, since it is passed by a register: ABI requires it's sign-extended.

You mean ```incr``` is sign extended after function ```MachineBasicBlock *MipsTargetLowering::emitAtomicBinaryPartword```?

https://github.com/llvm/llvm-project/pull/89246


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