[clang] [llvm] [AMDGPU][WIP] Add support for i64/f64 readlane, writelane and readfirstlane operations. (PR #89217)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 21 09:44:58 PDT 2024
================
@@ -4822,6 +4822,111 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
return RetBB;
}
+static MachineBasicBlock *lowerPseudoLaneOp(MachineInstr &MI,
----------------
arsenm wrote:
You should try to do this before selection. Doing it after just adds a lot of complexity and interferes with combine opportunities
https://github.com/llvm/llvm-project/pull/89217
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