[llvm] [AArch64] Replace AND with LSL#2 for LDR target (#34101) (PR #89531)

[via llvm-commits]

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git-clang-format --diff b5b34dbb27359139ef1eb2ca22e8c5a954e34e50 feebf129a4c8e3296e82f11d758181985b5a59c8 -- llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
index 1c331c8804..2dacc2a504 100644
--- a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
@@ -724,7 +724,7 @@ bool AArch64MIPeepholeOpt::visitLOAD(MachineInstr &MI) {
       if (immr != RegSize - 1)
         return false;
       Mask = ((uint64_t)1 << (RegSize - imms)) - 4;
-      new_imms = imms+2;
+      new_imms = imms + 2;
       new_immr = immr;
     } else {
       // we only need to handle case lsl #1

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https://github.com/llvm/llvm-project/pull/89531