[llvm] 7c7704c - [AMDGPU] Allow any linkage for dynlds (#84742)
via llvm-commits
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Fri Apr 19 01:58:39 PDT 2024
Author: Pierre van Houtryve
Date: 2024-04-19T10:58:35+02:00
New Revision: 7c7704c946ab6078c42b24a57eb537944861cba1
URL: https://github.com/llvm/llvm-project/commit/7c7704c946ab6078c42b24a57eb537944861cba1
DIFF: https://github.com/llvm/llvm-project/commit/7c7704c946ab6078c42b24a57eb537944861cba1.diff
LOG: [AMDGPU] Allow any linkage for dynlds (#84742)
Solves SWDEV-449592
Added:
llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
Modified:
llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
index 25e628e5cbc558..79c359a5755451 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
@@ -32,16 +32,12 @@ Align getAlign(DataLayout const &DL, const GlobalVariable *GV) {
}
bool isDynamicLDS(const GlobalVariable &GV) {
- // external zero size addrspace(3) without initializer implies cuda/hip extern
- // __shared__ the semantics for such a variable appears to be that all extern
- // __shared__ variables alias one another. This hits
diff erent handling.
+ // external zero size addrspace(3) without initializer is dynlds.
const Module *M = GV.getParent();
const DataLayout &DL = M->getDataLayout();
- if (GV.getType()->getPointerAddressSpace() != AMDGPUAS::LOCAL_ADDRESS) {
+ if (GV.getType()->getPointerAddressSpace() != AMDGPUAS::LOCAL_ADDRESS)
return false;
- }
- uint64_t AllocSize = DL.getTypeAllocSize(GV.getValueType());
- return GV.hasExternalLinkage() && AllocSize == 0;
+ return DL.getTypeAllocSize(GV.getValueType()) == 0;
}
bool isLDSVariableToLower(const GlobalVariable &GV) {
diff --git a/llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll b/llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
new file mode 100644
index 00000000000000..da1d23f1496cf3
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
@@ -0,0 +1,37 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s
+
+; This is an extension and should be rejected by the front-end in most cases.
+; If it goes through, lower it as dynlds.
+
+ at Var0 = linkonce_odr hidden local_unnamed_addr addrspace(3) global [0 x float] poison
+
+define void @fn(float %val, i32 %idx) {
+; CHECK-LABEL: define void @fn(
+; CHECK-SAME: float [[VAL:%.*]], i32 [[IDX:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
+; CHECK-NEXT: [[VAR0:%.*]] = getelementptr inbounds [1 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[VAR0]], align 4
+; CHECK-NEXT: [[VAR01:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr i32, ptr addrspace(3) [[VAR01]], i32 [[IDX]]
+; CHECK-NEXT: store float [[VAL]], ptr addrspace(3) [[PTR]], align 4
+; CHECK-NEXT: ret void
+;
+ %ptr = getelementptr i32, ptr addrspace(3) @Var0, i32 %idx
+ store float %val, ptr addrspace(3) %ptr
+ ret void
+}
+
+define amdgpu_kernel void @kernelA(float %val, i32 %idx) {
+; CHECK-LABEL: define amdgpu_kernel void @kernelA(
+; CHECK-SAME: float [[VAL:%.*]], i32 [[IDX:%.*]]) !llvm.amdgcn.lds.kernel.id [[META1:![0-9]+]] {
+; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernelA.dynlds) ]
+; CHECK-NEXT: tail call void @fn(float [[VAL]], i32 [[IDX]])
+; CHECK-NEXT: ret void
+;
+ tail call void @fn(float %val, i32 %idx)
+ ret void
+}
+;.
+; CHECK: [[META1]] = !{i32 0}
+;.
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