[llvm] [VPlan] Introduce recipes for VP loads and stores. (PR #87816)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 19 01:03:17 PDT 2024
================
@@ -9383,24 +9337,7 @@ void VPWidenLoadRecipe::execute(VPTransformState &State) {
Mask = Builder.CreateVectorReverse(Mask, "reverse");
}
- // TODO: split this into several classes for better design.
- if (State.EVL) {
- assert(State.UF == 1 && "Expected only UF == 1 when vectorizing with "
- "explicit vector length.");
- assert(cast<VPInstruction>(State.EVL)->getOpcode() ==
- VPInstruction::ExplicitVectorLength &&
- "EVL must be VPInstruction::ExplicitVectorLength.");
- Value *EVL = State.get(State.EVL, VPIteration(0, 0));
- // If EVL is not nullptr, then EVL must be a valid value set during plan
- // creation, possibly default value = whole vector register length. EVL
- // is created only if TTI prefers predicated vectorization, thus if EVL
- // is not nullptr it also implies preference for predicated
- // vectorization.
- // FIXME: Support reverse loading after vp_reverse is added.
- NewLI = lowerLoadUsingVectorIntrinsics(
- Builder, DataTy, State.get(getAddr(), Part, !CreateGather),
- CreateGather, Mask, EVL, Alignment);
- } else if (CreateGather) {
+ if (CreateGather) {
----------------
fhahn wrote:
Kept the braces as there are multi-line statements (for which I think it is recommended to use braces)
https://github.com/llvm/llvm-project/pull/87816
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