[llvm] [MIPS] Sign-extend subwords when expanding atomic max/min (PR #89246)

via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 18 21:09:02 PDT 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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git-clang-format --diff 3e64f8a4e74cdcaf5920879c86e7e0a827f6ec13 2e331854112b792feccb4eb2d536c2a27204874a -- llvm/lib/Target/Mips/MipsExpandPseudo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index 9bfef2a393..89d8a92dca 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -499,8 +499,7 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
           BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
               .addReg(Incr)
               .addReg(Mask);
-          BuildMI(loopMBB, DL, TII->get(Mips::CLZ), Scratch4)
-              .addReg(Mask);
+          BuildMI(loopMBB, DL, TII->get(Mips::CLZ), Scratch4).addReg(Mask);
           BuildMI(loopMBB, DL, TII->get(Mips::SLLV), OldVal)
               .addReg(OldVal)
               .addReg(Scratch4);

``````````

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https://github.com/llvm/llvm-project/pull/89246


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