[llvm] [InstCombine] Propagate exact flags in shift-combine transforms (PR #88340)

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``````````bash
git-clang-format --diff 396cdabe47f3596464b289d0937c0066f50a0ac6 483c2cb81a8d189223f56427adb255ab009b9aa5 -- llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 1cac4f3954..9fa711556f 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -1401,7 +1401,8 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
       if (AmtSum < BitWidth) {
         auto *NewLShr =
             BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
-        NewLShr->setIsExact(I.isExact() && cast<BinaryOperator>(Op0)->isExact());
+        NewLShr->setIsExact(I.isExact() &&
+                            cast<BinaryOperator>(Op0)->isExact());
         return NewLShr;
       }
     }
@@ -1640,7 +1641,8 @@ Instruction *InstCombinerImpl::visitAShr(BinaryOperator &I) {
       // Oversized arithmetic shifts replicate the sign bit.
       AmtSum = std::min(AmtSum, BitWidth - 1);
       // (X >>s C1) >>s C2 --> X >>s (C1 + C2)
-      Instruction *NewAshr = BinaryOperator::CreateAShr(X, ConstantInt::get(Ty, AmtSum));
+      Instruction *NewAshr =
+          BinaryOperator::CreateAShr(X, ConstantInt::get(Ty, AmtSum));
       NewAshr->setIsExact(I.isExact() && cast<BinaryOperator>(Op0)->isExact());
       return NewAshr;
     }

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https://github.com/llvm/llvm-project/pull/88340