[llvm] [Hexagon] Add Hexagon Copy Hoisting pass (PR #89313)
Perry MacMurray via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 18 14:15:05 PDT 2024
https://github.com/quic-pmacmurr created https://github.com/llvm/llvm-project/pull/89313
Adds the HexagonCopyHoisting pass, which moves a common copy instruction into a basic block if it is present in all successor basic blocks.
>From cb4721804738b89f2d1fc0b771d7747626b59c60 Mon Sep 17 00:00:00 2001
From: Perry MacMurray <pmacmurr at quicinc.com>
Date: Thu, 4 Apr 2024 19:27:46 -0700
Subject: [PATCH] [Hexagon] Add Hexagon Copy Hoisting pass
The purpose of this pass is to move the common copy instructions that
are present in all the successor of a basic block (BB) to the end of BB.
Co-authored-by: Jyotsna Verma <jverma at quicinc.com>
---
llvm/lib/Target/Hexagon/CMakeLists.txt | 1 +
.../Target/Hexagon/HexagonCopyHoisting.cpp | 294 ++++++++++++++++++
.../Target/Hexagon/HexagonTargetMachine.cpp | 10 +
.../CodeGen/Hexagon/hexagon-copy-hoisting.mir | 53 ++++
4 files changed, 358 insertions(+)
create mode 100644 llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
create mode 100644 llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
diff --git a/llvm/lib/Target/Hexagon/CMakeLists.txt b/llvm/lib/Target/Hexagon/CMakeLists.txt
index cdc062eee72b1e..9e4ca08aea40da 100644
--- a/llvm/lib/Target/Hexagon/CMakeLists.txt
+++ b/llvm/lib/Target/Hexagon/CMakeLists.txt
@@ -26,6 +26,7 @@ add_llvm_target(HexagonCodeGen
HexagonCommonGEP.cpp
HexagonConstExtenders.cpp
HexagonConstPropagation.cpp
+ HexagonCopyHoisting.cpp
HexagonCopyToCombine.cpp
HexagonEarlyIfConv.cpp
HexagonExpandCondsets.cpp
diff --git a/llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp b/llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
new file mode 100644
index 00000000000000..0b25b9259f082e
--- /dev/null
+++ b/llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
@@ -0,0 +1,294 @@
+//===--------- HexagonCopyHoisting.cpp - Hexagon Copy Hoisting ----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+// The purpose of this pass is to move the copy instructions that are
+// present in all the successor of a basic block (BB) to the end of BB.
+//===----------------------------------------------------------------------===//
+
+#include "llvm/ADT/PostOrderIterator.h"
+#include "llvm/ADT/PostOrderIterator.h"
+#include "llvm/ADT/StringMap.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/CommandLine.h"
+#include "HexagonTargetMachine.h"
+
+#define DEBUG_TYPE "CopyHoist"
+
+using namespace llvm;
+
+static cl::opt<std::string> CPHoistFn("cphoistfn", cl::Hidden, cl::desc(""),
+ cl::init(""));
+
+namespace llvm {
+ void initializeHexagonCopyHoistingPass(PassRegistry& Registry);
+ FunctionPass *createHexagonCopyHoisting();
+}
+
+namespace {
+
+class HexagonCopyHoisting : public MachineFunctionPass {
+
+public:
+ static char ID;
+ HexagonCopyHoisting()
+ : MachineFunctionPass(ID), MFN(0), MRI(0) {
+ initializeHexagonCopyHoistingPass(*PassRegistry::getPassRegistry());
+ }
+
+ StringRef getPassName() const override {
+ return "Hexagon Copy Hoisting";
+ }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.addRequired<SlotIndexes>();
+ AU.addRequired<LiveIntervals>();
+ AU.addPreserved<SlotIndexes>();
+ AU.addPreserved<LiveIntervals>();
+ AU.addRequired<MachineDominatorTree>();
+ AU.addPreserved<MachineDominatorTree>();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
+ bool runOnMachineFunction(MachineFunction &Fn) override;
+ void collectCopyInst();
+ void addMItoCopyList(MachineInstr *MI);
+ bool analyzeCopy(MachineBasicBlock *BB);
+ bool isSafetoMove(MachineInstr *CandMI);
+ void moveCopyInstr(MachineBasicBlock *DestBB, StringRef key,
+ MachineInstr *MI);
+
+ MachineFunction *MFN;
+ MachineRegisterInfo *MRI;
+ StringMap<MachineInstr*> CopyMI;
+ std::vector<StringMap<MachineInstr*> > CopyMIList;
+};
+
+}
+
+char HexagonCopyHoisting::ID = 0;
+
+namespace llvm {
+ char &HexagonCopyHoistingID = HexagonCopyHoisting::ID;
+}
+
+bool HexagonCopyHoisting::runOnMachineFunction(MachineFunction &Fn) {
+
+ if ((CPHoistFn != "") && (CPHoistFn != Fn.getFunction().getName()))
+ return false;
+
+ MFN = &Fn;
+ MRI = &Fn.getRegInfo();
+
+ LLVM_DEBUG(dbgs() << "\nCopy Hoisting:"
+ << "\'" << Fn.getName() << "\'\n");
+
+ CopyMIList.clear();
+ CopyMIList.resize(Fn.getNumBlockIDs());
+
+ // Traverse through all basic blocks and collect copy instructions.
+ collectCopyInst();
+
+ // Traverse through the basic blocks again and move the COPY instructions
+ // that are present in all the successors of BB to BB.
+ bool changed = false;
+ for (auto I = po_begin(&Fn), E = po_end(&Fn); I != E; ++I) {
+ MachineBasicBlock &BB = **I;
+ if (!BB.empty()) {
+ if (BB.pred_size() != 1)//
+ continue;
+ auto &BBCopyInst = CopyMIList[BB.getNumber()];
+ if (BBCopyInst.size() > 0)
+ changed |= analyzeCopy(*BB.pred_begin());
+ }
+ }
+ // Re-compute liveness
+ if (changed) {
+ LiveIntervals &LIS = getAnalysis<LiveIntervals>();
+ SlotIndexes *SI = LIS.getSlotIndexes();
+ SI->releaseMemory();
+ SI->runOnMachineFunction(Fn);
+ LIS.releaseMemory();
+ LIS.runOnMachineFunction(Fn);
+ }
+ return changed;
+}
+
+//===----------------------------------------------------------------------===//
+// Save all COPY instructions for each basic block in CopyMIList vector.
+//===----------------------------------------------------------------------===//
+void HexagonCopyHoisting::collectCopyInst() {
+ for (auto BI = MFN->begin(), BE = MFN->end(); BI != BE; ++BI) {
+ MachineBasicBlock *BB = &*BI;
+#ifndef NDEBUG
+ auto &BBCopyInst = CopyMIList[BB->getNumber()];
+ LLVM_DEBUG(dbgs() << "Visiting BB#" << BB->getNumber() << ":\n");
+#endif
+
+ for (auto MII = BB->begin(), MIE = BB->end(); MII != MIE; ++MII) {
+ MachineInstr *MI = &*MII;
+ if (MI->getOpcode() == TargetOpcode::COPY )
+ addMItoCopyList(MI);
+ }
+ LLVM_DEBUG(dbgs() << "\tNumber of copies: " << BBCopyInst.size() << "\n");
+ }
+}
+
+void HexagonCopyHoisting::addMItoCopyList(MachineInstr *MI) {
+ unsigned BBNum = MI->getParent()->getNumber();
+ auto &BBCopyInst = CopyMIList[BBNum];
+ unsigned DstReg = MI->getOperand(0).getReg();
+ unsigned SrcReg = MI->getOperand(1).getReg();
+
+ if (!Register::isVirtualRegister(DstReg) ||
+ !Register::isVirtualRegister(SrcReg) ||
+ MRI->getRegClass(DstReg) != &Hexagon::IntRegsRegClass ||
+ MRI->getRegClass(SrcReg) != &Hexagon::IntRegsRegClass)
+ return;
+
+ StringRef key;
+ SmallString<256> TmpData("");
+ (void)Twine(Register::virtReg2Index(DstReg)).toStringRef(TmpData);
+ TmpData+='=';
+ key = Twine(Register::virtReg2Index(SrcReg)).toStringRef(TmpData);
+ BBCopyInst[key]=MI;
+#ifndef NDEBUG
+ LLVM_DEBUG(dbgs() << "\tAdding Copy Instr to the list: " << MI << "\n");
+ for (auto II = BBCopyInst.begin(), IE = BBCopyInst.end(); II != IE; ++II) {
+ MachineInstr *TempMI = (*II).getValue();
+ LLVM_DEBUG(dbgs() << "\tIn the list: " << TempMI << "\n");
+ }
+#endif
+}
+
+//===----------------------------------------------------------------------===//
+// Look at the COPY instructions of all the successors of BB. If the same
+// instruction is present in every successor and can be safely moved,
+// pull it into BB.
+//===----------------------------------------------------------------------===//
+bool HexagonCopyHoisting::analyzeCopy(MachineBasicBlock *BB) {
+
+ bool changed = false;
+ if (BB->succ_size() < 2 )
+ return false;
+
+ for (auto I = BB->succ_begin(), E = BB->succ_end(); I != E; ++I) {
+ MachineBasicBlock *SB = *I;
+ if (SB->pred_size() != 1 || SB->isEHPad() || SB->hasAddressTaken())
+ return false;
+ }
+
+ auto SuccI = BB->succ_begin(), SuccE = BB->succ_end();
+
+ MachineBasicBlock *SBB1 = *SuccI;
+ ++SuccI;
+ auto &BBCopyInst1 = CopyMIList[SBB1->getNumber()];
+
+ for ( auto II = BBCopyInst1.begin(), IE = BBCopyInst1.end(); II != IE; ++II) {
+ StringRef key = (*II).getKeyData();
+ MachineInstr *MI = (*II).getValue();
+ bool IsSafetoMove = true;
+ for (SuccI = BB->succ_begin(); SuccI != SuccE; ++SuccI) {
+ MachineBasicBlock *SuccBB = *SuccI;
+ auto &SuccBBCopyInst = CopyMIList[SuccBB->getNumber()];
+ if (!SuccBBCopyInst.count(key)) {
+ // Same copy not present in this successor
+ IsSafetoMove = false;
+ break;
+ }
+ // If present, make sure that it's safe to pull this copy instruction
+ // into the predecessor.
+ MachineInstr *SuccMI = SuccBBCopyInst[key];
+ if (!isSafetoMove(SuccMI)) {
+ IsSafetoMove = false;
+ break;
+ }
+ }
+ // If we have come this far, this copy instruction can be safely
+ // moved to the predecessor basic block.
+ if (IsSafetoMove) {
+ LLVM_DEBUG(dbgs() << "\t\t Moving instr to BB#" << BB->getNumber() << ": "
+ << MI << "\n");
+ moveCopyInstr(BB, key, MI);
+ // Add my into BB copyMI list.
+ changed = true;
+ }
+ }
+
+#ifndef NDEBUG
+ auto &BBCopyInst = CopyMIList[BB->getNumber()];
+ for ( auto II = BBCopyInst.begin(), IE = BBCopyInst.end(); II != IE; ++II) {
+ MachineInstr *TempMI = (*II).getValue();
+ LLVM_DEBUG(dbgs() << "\tIn the list: " << TempMI << "\n");
+ }
+#endif
+ return changed;
+}
+
+bool HexagonCopyHoisting::isSafetoMove(MachineInstr *CandMI) {
+// Make sure that it's safe to move this 'copy' instruction to the predecessor
+// basic block.
+ assert(CandMI->getOperand(0).isReg() && CandMI->getOperand(1).isReg());
+ unsigned DefR = CandMI->getOperand(0).getReg();
+ unsigned UseR = CandMI->getOperand(1).getReg();
+
+ MachineBasicBlock *BB = CandMI->getParent();
+ // There should not be a def/use of DefR between the start of BB and CandMI.
+ MachineBasicBlock::iterator MII, MIE;
+ for (MII = BB->begin(), MIE = CandMI; MII != MIE; ++MII) {
+ MachineInstr *otherMI = &*MII;
+ for (MachineInstr::mop_iterator Mo = otherMI->operands_begin(),
+ E = otherMI->operands_end(); Mo != E; ++Mo)
+ if (Mo->isReg() && Mo->getReg() == DefR)
+ return false;
+ }
+ // There should not be a def of UseR between the start of BB and CandMI.
+ for (MII = BB->begin(), MIE = CandMI; MII != MIE; ++MII) {
+ MachineInstr *otherMI = &*MII;
+ for (MachineInstr::mop_iterator Mo = otherMI->operands_begin(),
+ E = otherMI->operands_end(); Mo != E; ++Mo)
+ if (Mo->isReg() && Mo->isDef() && Mo->getReg() == UseR)
+ return false;
+ }
+ return true;
+}
+
+void HexagonCopyHoisting::moveCopyInstr(MachineBasicBlock *DestBB,
+ StringRef key, MachineInstr *MI) {
+ MachineBasicBlock::iterator FirstTI = DestBB->getFirstTerminator();
+ assert(FirstTI != DestBB->end());
+
+ DestBB->splice(FirstTI, MI->getParent(), MI);
+
+ addMItoCopyList(MI);
+ auto I = ++(DestBB->succ_begin()), E = DestBB->succ_end();
+ for (; I != E; ++I) {
+ MachineBasicBlock *SuccBB = *I;
+ auto &BBCopyInst = CopyMIList[SuccBB->getNumber()];
+ MachineInstr *SuccMI = BBCopyInst[key];
+ SuccMI->eraseFromParent();
+ BBCopyInst.erase(key);
+ }
+}
+
+//===----------------------------------------------------------------------===//
+// Public Constructor Functions
+//===----------------------------------------------------------------------===//
+
+INITIALIZE_PASS(HexagonCopyHoisting, "hexagon-move-phicopy",
+ "Hexagon move phi copy", false, false)
+
+FunctionPass* llvm::createHexagonCopyHoisting() {
+ return new HexagonCopyHoisting();
+}
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index e64d7e52a9aa9b..8e5fe6dd61b834 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -72,6 +72,10 @@ static cl::opt<bool> EnableTfrCleanup("hexagon-tfr-cleanup", cl::init(true),
static cl::opt<bool> EnableEarlyIf("hexagon-eif", cl::init(true), cl::Hidden,
cl::desc("Enable early if-conversion"));
+static cl::opt<bool> EnableCopyHoist("hexagon-copy-hoist", cl::init(true),
+ cl::Hidden, cl::ZeroOrMore,
+ cl::desc("Enable Hexagon copy hoisting"));
+
static cl::opt<bool> EnableGenInsert("hexagon-insert", cl::init(true),
cl::Hidden, cl::desc("Generate \"insert\" instructions"));
@@ -152,9 +156,11 @@ SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler",
createVLIWMachineSched);
namespace llvm {
+ extern char &HexagonCopyHoistingID;
extern char &HexagonExpandCondsetsID;
extern char &HexagonTfrCleanupID;
void initializeHexagonBitSimplifyPass(PassRegistry&);
+ void initializeHexagonCopyHoistingPass(PassRegistry&);
void initializeHexagonConstExtendersPass(PassRegistry&);
void initializeHexagonConstPropagationPass(PassRegistry&);
void initializeHexagonCopyToCombinePass(PassRegistry&);
@@ -184,6 +190,7 @@ namespace llvm {
FunctionPass *createHexagonCommonGEP();
FunctionPass *createHexagonConstExtenders();
FunctionPass *createHexagonConstPropagationPass();
+ FunctionPass *createHexagonCopyHoisting();
FunctionPass *createHexagonCopyToCombine();
FunctionPass *createHexagonEarlyIfConversion();
FunctionPass *createHexagonFixupHwLoops();
@@ -260,6 +267,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT,
(HexagonNoOpt ? CodeGenOptLevel::None : OL)),
TLOF(std::make_unique<HexagonTargetObjectFile>()),
Subtarget(Triple(TT), CPU, FS, *this) {
+ initializeHexagonCopyHoistingPass(*PassRegistry::getPassRegistry());
initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry());
initializeHexagonLoopAlignPass(*PassRegistry::getPassRegistry());
initializeHexagonTfrCleanupPass(*PassRegistry::getPassRegistry());
@@ -433,6 +441,8 @@ void HexagonPassConfig::addPreRegAlloc() {
addPass(createHexagonConstExtenders());
if (EnableExpandCondsets)
insertPass(&RegisterCoalescerID, &HexagonExpandCondsetsID);
+ if (EnableCopyHoist)
+ insertPass(&RegisterCoalescerID, &HexagonCopyHoistingID);
if (EnableTfrCleanup)
insertPass(&VirtRegRewriterID, &HexagonTfrCleanupID);
if (!DisableStoreWidening)
diff --git a/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir b/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
new file mode 100644
index 00000000000000..0836cac7f9134f
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
@@ -0,0 +1,53 @@
+# RUN: llc -march=hexagon -run-pass hexagon-move-phicopy -o - %s | FileCheck %s
+
+# CHECK-COUNT-1: %4:intregs = COPY %1
+
+# CHECK: bb.1
+# CHECK-NOT: %4:intregs = COPY %1
+
+# CHECK: bb.2
+# CHECK-NOT: %4:intregs = COPY %1
+# CHECK: %5:intregs = COPY %0
+
+---
+name: f0
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: intregs, preferred-register: '' }
+ - { id: 1, class: intregs, preferred-register: '' }
+ - { id: 2, class: predregs, preferred-register: '' }
+ - { id: 3, class: predregs, preferred-register: '' }
+ - { id: 4, class: intregs, preferred-register: '' }
+ - { id: 5, class: intregs, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+stack:
+ - { id: 0, offset: 0, size: 4, alignment: 8 }
+body: |
+ bb.0:
+ successors: %bb.1, %bb.2
+ liveins: $r0, $r1
+
+ %1:intregs = COPY $r1
+ %0:intregs = COPY $r0
+ %2:predregs = C2_cmpgt %0, %1
+ %3:predregs = C2_not %2
+ J2_jumpt %3, %bb.2, implicit-def dead $pc
+ J2_jump %bb.1, implicit-def dead $pc
+
+ bb.1:
+ successors: %bb.0
+
+ %4:intregs = COPY %1
+ $r1 = COPY %4
+ J2_jump %bb.0, implicit-def dead $pc
+
+ bb.2:
+ successors: %bb.0
+
+ %4:intregs = COPY %1
+ %5:intregs = COPY %0
+ $r1 = COPY %4
+ J2_jump %bb.0, implicit-def dead $pc
+...
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