[llvm] a71c1b3 - [RISCV] Remove unused HasStdExtZama16b Predicate. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 18 11:40:12 PDT 2024
Author: Craig Topper
Date: 2024-04-18T11:40:03-07:00
New Revision: a71c1b34525c836ab8fbefe4cc3029699ac208a4
URL: https://github.com/llvm/llvm-project/commit/a71c1b34525c836ab8fbefe4cc3029699ac208a4
DIFF: https://github.com/llvm/llvm-project/commit/a71c1b34525c836ab8fbefe4cc3029699ac208a4.diff
LOG: [RISCV] Remove unused HasStdExtZama16b Predicate. NFC
Added:
Modified:
llvm/lib/Target/RISCV/RISCVFeatures.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 8c434a23b10ee7..339c0397fa4518 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -209,9 +209,6 @@ def HasStdExtAOrZalrsc
def FeatureStdExtZama16b
: SubtargetFeature<"zama16b", "HasStdExtZama16b", "true",
"'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)">;
-def HasStdExtZama16b : Predicate<"Subtarget->hasStdExtZama16b()">,
- AssemblerPredicate<(all_of FeatureStdExtZama16b),
- "'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)">;
def FeatureStdExtZawrs : SubtargetFeature<"zawrs", "HasStdExtZawrs", "true",
"'Zawrs' (Wait on Reservation Set)">;
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