[llvm] [SelectionDAG] Require UADDO_CARRY carryin and carryout to have the same type. (PR #89255)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 18 09:00:55 PDT 2024
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/89255
None
>From 5abe137c404039b830ffb07a4aef6643a5f7dd77 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 18 Apr 2024 08:59:45 -0700
Subject: [PATCH] [SelectionDAG] Require UADDO_CARRY carryin and carryout to
have the same type.
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 ++--
.../SelectionDAG/LegalizeIntegerTypes.cpp | 20 +------------------
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 -
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +-
4 files changed, 4 insertions(+), 23 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 0ea0c0df7f3726..7e16edafc9443d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3359,7 +3359,7 @@ SDValue DAGCombiner::visitUADDO_CARRY(SDNode *N) {
}
/**
- * If we are facing some sort of diamond carry propapagtion pattern try to
+ * If we are facing some sort of diamond carry propagation pattern try to
* break it up to generate something like:
* (uaddo_carry X, 0, (uaddo_carry A, B, Z):Carry)
*
@@ -3400,7 +3400,7 @@ static SDValue combineUADDO_CARRYDiamond(DAGCombiner &Combiner,
Z = Carry0.getOperand(2);
} else if (Carry0.getOpcode() == ISD::UADDO &&
isOneConstant(Carry0.getOperand(1))) {
- EVT VT = Combiner.getSetCCResultType(Carry0.getValueType());
+ EVT VT = Carry0->getValueType(1);
Z = DAG.getConstant(1, SDLoc(Carry0.getOperand(1)), VT);
} else {
// We couldn't find a suitable Z.
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 93ce9c22af5525..55f9737bc94dd5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -949,7 +949,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_Overflow(SDNode *N) {
unsigned NumOps = N->getNumOperands();
assert(NumOps <= 3 && "Too many operands");
if (NumOps == 3)
- Ops[2] = N->getOperand(2);
+ Ops[2] = PromoteTargetBoolean(N->getOperand(2), VT);
SDLoc dl(N);
SDValue Res = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(VT, SVT),
@@ -1867,11 +1867,6 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
case ISD::FSHL:
case ISD::FSHR: Res = PromoteIntOp_FunnelShift(N); break;
- case ISD::SADDO_CARRY:
- case ISD::SSUBO_CARRY:
- case ISD::UADDO_CARRY:
- case ISD::USUBO_CARRY: Res = PromoteIntOp_ADDSUBO_CARRY(N, OpNo); break;
-
case ISD::FRAMEADDR:
case ISD::RETURNADDR: Res = PromoteIntOp_FRAMERETURNADDR(N); break;
@@ -2373,19 +2368,6 @@ SDValue DAGTypeLegalizer::PromoteIntOp_VP_ZERO_EXTEND(SDNode *N) {
N->getOperand(1), N->getOperand(2));
}
-SDValue DAGTypeLegalizer::PromoteIntOp_ADDSUBO_CARRY(SDNode *N, unsigned OpNo) {
- assert(OpNo == 2 && "Don't know how to promote this operand!");
-
- SDValue LHS = N->getOperand(0);
- SDValue RHS = N->getOperand(1);
- SDValue Carry = N->getOperand(2);
- SDLoc DL(N);
-
- Carry = PromoteTargetBoolean(Carry, LHS.getValueType());
-
- return SDValue(DAG.UpdateNodeOperands(N, LHS, RHS, Carry), 0);
-}
-
SDValue DAGTypeLegalizer::PromoteIntOp_FIX(SDNode *N) {
SDValue Op2 = ZExtPromotedInteger(N->getOperand(2));
return SDValue(
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index 919c0d4fd2007c..0483f7c74f91a2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -389,7 +389,6 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
- SDValue PromoteIntOp_ADDSUBO_CARRY(SDNode *N, unsigned OpNo);
SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
SDValue PromoteIntOp_FIX(SDNode *N);
SDValue PromoteIntOp_ExpOp(SDNode *N);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f3441c9df0f8c0..7dbf83b7adeef0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -9924,7 +9924,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
Ops[0].getValueType() == Ops[1].getValueType() &&
Ops[0].getValueType() == VTList.VTs[0] &&
- Ops[2].getValueType().isInteger() &&
+ Ops[2].getValueType() == VTList.VTs[1] &&
"Binary operator types must match!");
break;
case ISD::SMUL_LOHI:
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