[llvm] 16fed31 - [AMDGPU] Fix debug line table for MSG_DEALLOC_VGPRS optimization (#88924)

[via llvm-commits]

Author: Emma Pilkington
Date: 2024-04-18T09:29:32-04:00
New Revision: 16fed31f440ff7b194cb0f843e46339e28aa7982

URL: https://github.com/llvm/llvm-project/commit/16fed31f440ff7b194cb0f843e46339e28aa7982
DIFF: https://github.com/llvm/llvm-project/commit/16fed31f440ff7b194cb0f843e46339e28aa7982.diff

LOG: [AMDGPU] Fix debug line table for MSG_DEALLOC_VGPRS optimization (#88924)

Deallocating VGPRs interferes with doing a context save, which is needed for GDB
to report a breakpoint. So, in this sequence:

  s_sendmsg MSG_DEALLOC_VGPRS
  s_endpgm

We now use the debug location of the s_endpgm for the s_sendmsg, so a breakpoint
set in the debugger at the end of a shader will be hit before deallocating VGPRs.

Added: 
    llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir

Modified: 
    llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 556ec3e231ff19..36de5b89af0280 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -2665,10 +2665,11 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
   // instructions.
   for (MachineInstr *MI : ReleaseVGPRInsts) {
     if (ST->requiresNopBeforeDeallocVGPRs()) {
-      BuildMI(*MI->getParent(), MI, DebugLoc(), TII->get(AMDGPU::S_NOP))
+      BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(AMDGPU::S_NOP))
           .addImm(0);
     }
-    BuildMI(*MI->getParent(), MI, DebugLoc(), TII->get(AMDGPU::S_SENDMSG))
+    BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
+            TII->get(AMDGPU::S_SENDMSG))
         .addImm(AMDGPU::SendMsg::ID_DEALLOC_VGPRS_GFX11Plus);
     Modified = true;
   }

diff  --git a/llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir b/llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
new file mode 100644
index 00000000000000..e50ee11fef51c0
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
@@ -0,0 +1,40 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=si-insert-waitcnts -o - %s | FileCheck %s
+
+# Verify that si-insert-waitcnts copies debug locations from the s_endpgm to the
+# "dealloc vgprs" s_sendmsg. If these are not present, the debugger will be
+# unable to break at the end of the shader.
+
+--- |
+  define amdgpu_ps void @test() !dbg !5 { ret void, !dbg !8 }
+
+  !llvm.dbg.cu = !{!0}
+  !llvm.debugify = !{!2, !3}
+  !llvm.module.flags = !{!4}
+
+  !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+  !1 = !DIFile(filename: "t.ll", directory: "/")
+  !2 = !{i32 1}
+  !3 = !{i32 0}
+  !4 = !{i32 2, !"Debug Info Version", i32 3}
+  !5 = distinct !DISubprogram(name: "test", linkageName: "test", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+  !6 = !DISubroutineType(types: !7)
+  !7 = !{}
+  !8 = !DILocation(line: 1, column: 1, scope: !5)
+...
+
+---
+name:            test
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test
+    ; CHECK: GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr1, 0, 4, implicit $exec
+    ; CHECK-NEXT: S_NOP 0, debug-location !8
+    ; CHECK-NEXT: S_SENDMSG 3, implicit $exec, implicit $m0, debug-location !8
+    ; CHECK-NEXT: S_ENDPGM 0, debug-location !8
+    GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr1, 0, 4, implicit $exec
+    S_ENDPGM 0, debug-location !8
+...
+