[llvm] [AMDGPU] Support wide register or subregister access when emitting s_singleuse_vdst instructions. (PR #88520)

[Scott Egerton via llvm-commits]

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@@ -64,13 +64,15 @@ class AMDGPUInsertSingleUseVDST : public MachineFunctionPass {
     bool InstructionEmitted = false;
 
     for (MachineBasicBlock &MBB : MF) {
-      DenseMap<MCPhysReg, unsigned> RegisterUseCount; // TODO: MCRegUnits
+      DenseMap<MCRegUnit, unsigned> RegisterUseCount;
 
       // Handle boundaries at the end of basic block separately to avoid
       // false positives. If they are live at the end of a basic block then
       // assume it has more uses later on.
-      for (const auto &Liveouts : MBB.liveouts())
-        RegisterUseCount[Liveouts.PhysReg] = 2;
+      for (const auto &Liveout : MBB.liveouts()) {
+        for (const MCRegUnit &Unit : TRI->regunits(Liveout.PhysReg))
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ScottEgerton wrote:

I wasn't aware of `MCRegUnitMaskIterator`. I've added this in.

https://github.com/llvm/llvm-project/pull/88520