[llvm] [llvm][mc][riscv] MC support of T-Head vector extension (xtheadvector) (PR #84447)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,990 @@
+//===-- RISCVInstrInfoXTHeadV.td ---------------------------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+///
+/// This file describes the RISC-V instructions from the standard 'V' Vector
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topperc wrote:

Please clarify this comment is for the T-Head implementation since all instruction names have `th.` prefix it is not the standard extension.

https://github.com/llvm/llvm-project/pull/84447