[llvm] 3e2aad4 - [RISCV] Speed up RISCVRegisterInfo::needsFrameBaseReg when frame pointer isn't used. NFC (#89163)
via llvm-commits
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Wed Apr 17 21:03:40 PDT 2024
Author: Craig Topper
Date: 2024-04-17T21:03:35-07:00
New Revision: 3e2aad412ada8f1db88c9e0f984a302deed74f4b
URL: https://github.com/llvm/llvm-project/commit/3e2aad412ada8f1db88c9e0f984a302deed74f4b
DIFF: https://github.com/llvm/llvm-project/commit/3e2aad412ada8f1db88c9e0f984a302deed74f4b.diff
LOG: [RISCV] Speed up RISCVRegisterInfo::needsFrameBaseReg when frame pointer isn't used. NFC (#89163)
The callee saved size is only used if there is a frame pointer. Sink the
code onto the frame pointer only path.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 84af6eec40ee6f..367a62e830cbf5 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -607,20 +607,22 @@ bool RISCVRegisterInfo::needsFrameBaseReg(MachineInstr *MI,
const MachineFrameInfo &MFI = MF.getFrameInfo();
const RISCVFrameLowering *TFI = getFrameLowering(MF);
const MachineRegisterInfo &MRI = MF.getRegInfo();
- unsigned CalleeSavedSize = 0;
Offset += getFrameIndexInstrOffset(MI, FIOperandNum);
- // Estimate the stack size used to store callee saved registers(
- // excludes reserved registers).
- BitVector ReservedRegs = getReservedRegs(MF);
- for (const MCPhysReg *R = MRI.getCalleeSavedRegs(); MCPhysReg Reg = *R; ++R) {
- if (!ReservedRegs.test(Reg))
- CalleeSavedSize += getSpillSize(*getMinimalPhysRegClass(Reg));
- }
+ if (TFI->hasFP(MF) && !shouldRealignStack(MF)) {
+ // Estimate the stack size used to store callee saved registers(
+ // excludes reserved registers).
+ unsigned CalleeSavedSize = 0;
+ BitVector ReservedRegs = getReservedRegs(MF);
+ for (const MCPhysReg *R = MRI.getCalleeSavedRegs(); MCPhysReg Reg = *R;
+ ++R) {
+ if (!ReservedRegs.test(Reg))
+ CalleeSavedSize += getSpillSize(*getMinimalPhysRegClass(Reg));
+ }
- int64_t MaxFPOffset = Offset - CalleeSavedSize;
- if (TFI->hasFP(MF) && !shouldRealignStack(MF))
+ int64_t MaxFPOffset = Offset - CalleeSavedSize;
return !isFrameOffsetLegal(MI, RISCV::X8, MaxFPOffset);
+ }
// Assume 128 bytes spill slots size to estimate the maximum possible
// offset relative to the stack pointer.
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