[llvm] 823eb1a - [SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (#89133)
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Wed Apr 17 16:52:07 PDT 2024
Author: Craig Topper
Date: 2024-04-17T16:52:02-07:00
New Revision: 823eb1a3252dd773f9c4d92093591f1b39ac27d4
URL: https://github.com/llvm/llvm-project/commit/823eb1a3252dd773f9c4d92093591f1b39ac27d4
DIFF: https://github.com/llvm/llvm-project/commit/823eb1a3252dd773f9c4d92093591f1b39ac27d4.diff
LOG: [SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (#89133)
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index ca0a95750ba8d8..f3441c9df0f8c0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -9915,6 +9915,18 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
}
break;
}
+ case ISD::SADDO_CARRY:
+ case ISD::UADDO_CARRY:
+ case ISD::SSUBO_CARRY:
+ case ISD::USUBO_CARRY:
+ assert(VTList.NumVTs == 2 && Ops.size() == 3 &&
+ "Invalid add/sub overflow op!");
+ assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
+ Ops[0].getValueType() == Ops[1].getValueType() &&
+ Ops[0].getValueType() == VTList.VTs[0] &&
+ Ops[2].getValueType().isInteger() &&
+ "Binary operator types must match!");
+ break;
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI: {
assert(VTList.NumVTs == 2 && Ops.size() == 2 && "Invalid mul lo/hi op!");
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