[llvm] [IR] Add support for ignoring poisons in `getSplatValue` (PR #89155)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 17 16:07:25 PDT 2024
https://github.com/goldsteinn created https://github.com/llvm/llvm-project/pull/89155
This is a followup to #88217
>From 5a98da2988fa021e408bde42182a0bc09e137441 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 17 Apr 2024 18:06:12 -0500
Subject: [PATCH] [IR] Add support for ignoring poisons in `getSplatValue`
This is a followup to #88217
---
llvm/include/llvm/IR/Constant.h | 3 +-
llvm/include/llvm/IR/Constants.h | 3 +-
llvm/include/llvm/IR/PatternMatch.h | 24 +++++++------
llvm/lib/IR/Constants.cpp | 31 ++++++++++++-----
.../Analysis/ValueTracking/known-non-zero.ll | 34 ++++++++-----------
llvm/test/Transforms/InstCombine/add.ll | 21 +++++-------
llvm/test/Transforms/InstCombine/and.ll | 28 +++++++--------
llvm/test/Transforms/InstCombine/ashr-lshr.ll | 8 ++---
llvm/test/Transforms/InstCombine/cast.ll | 12 +++----
.../Transforms/InstCombine/getelementptr.ll | 14 ++++----
.../Transforms/InstCombine/icmp-logical.ll | 18 ++++------
.../test/Transforms/InstCombine/icmp-range.ll | 32 ++++++++---------
llvm/test/Transforms/InstCombine/icmp-shr.ll | 10 +++---
llvm/test/Transforms/InstCombine/lshr.ll | 5 ++-
.../Transforms/InstCombine/minmax-fold.ll | 7 ++--
.../InstCombine/mul-inseltpoison.ll | 6 ++--
llvm/test/Transforms/InstCombine/mul.ll | 31 ++++++++---------
.../test/Transforms/InstCombine/opaque-ptr.ll | 5 ++-
llvm/test/Transforms/InstCombine/or.ll | 14 +++-----
.../InstCombine/saturating-add-sub.ll | 4 +--
...ount-reassociation-with-truncation-ashr.ll | 6 ++--
llvm/test/Transforms/InstCombine/shift.ll | 27 +++++++--------
llvm/test/Transforms/InstCombine/shl-sub.ll | 3 +-
llvm/test/Transforms/InstCombine/sub.ll | 15 ++++----
.../InstCombine/trunc-shift-trunc.ll | 14 ++++----
.../InstCombine/vector-casts-inseltpoison.ll | 3 +-
.../Transforms/InstCombine/vector-casts.ll | 3 +-
27 files changed, 182 insertions(+), 199 deletions(-)
diff --git a/llvm/include/llvm/IR/Constant.h b/llvm/include/llvm/IR/Constant.h
index 778764062227cb..ec2ddb5564e73f 100644
--- a/llvm/include/llvm/IR/Constant.h
+++ b/llvm/include/llvm/IR/Constant.h
@@ -148,7 +148,8 @@ class Constant : public User {
/// If all elements of the vector constant have the same value, return that
/// value. Otherwise, return nullptr. Ignore undefined elements by setting
/// AllowUndefs to true.
- Constant *getSplatValue(bool AllowUndefs = false) const;
+ Constant *getSplatValue(bool AllowUndefs = false,
+ bool AllowPoisons = false) const;
/// If C is a constant integer then return its value, otherwise C must be a
/// vector of constant integers, all equal, and the common value is returned.
diff --git a/llvm/include/llvm/IR/Constants.h b/llvm/include/llvm/IR/Constants.h
index 4290ef4486c6f4..4af0756de463da 100644
--- a/llvm/include/llvm/IR/Constants.h
+++ b/llvm/include/llvm/IR/Constants.h
@@ -534,7 +534,8 @@ class ConstantVector final : public ConstantAggregate {
/// If all elements of the vector constant have the same value, return that
/// value. Otherwise, return nullptr. Ignore undefined elements by setting
/// AllowUndefs to true.
- Constant *getSplatValue(bool AllowUndefs = false) const;
+ Constant *getSplatValue(bool AllowUndefs = false,
+ bool AllowPoisons = false) const;
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const Value *V) {
diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h
index 98cc0e50376981..08ac9275463603 100644
--- a/llvm/include/llvm/IR/PatternMatch.h
+++ b/llvm/include/llvm/IR/PatternMatch.h
@@ -255,8 +255,8 @@ struct apint_match {
}
if (V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- if (auto *CI =
- dyn_cast_or_null<ConstantInt>(C->getSplatValue(AllowUndef))) {
+ if (auto *CI = dyn_cast_or_null<ConstantInt>(
+ C->getSplatValue(AllowUndef, /*AllowPoisons=*/true))) {
Res = &CI->getValue();
return true;
}
@@ -280,8 +280,8 @@ struct apfloat_match {
}
if (V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- if (auto *CI =
- dyn_cast_or_null<ConstantFP>(C->getSplatValue(AllowUndef))) {
+ if (auto *CI = dyn_cast_or_null<ConstantFP>(
+ C->getSplatValue(AllowUndef, /*AllowPoisons=*/true))) {
Res = &CI->getValueAPF();
return true;
}
@@ -353,7 +353,8 @@ struct cstval_pred_ty : public Predicate {
return this->isValue(CV->getValue());
if (const auto *VTy = dyn_cast<VectorType>(V->getType())) {
if (const auto *C = dyn_cast<Constant>(V)) {
- if (const auto *CV = dyn_cast_or_null<ConstantVal>(C->getSplatValue()))
+ if (const auto *CV = dyn_cast_or_null<ConstantVal>(
+ C->getSplatValue(/*AllowUndefs=*/false, /*AllowPoisons=*/true)))
return this->isValue(CV->getValue());
// Number of elements of a scalable vector unknown at compile time
@@ -406,7 +407,8 @@ template <typename Predicate> struct api_pred_ty : public Predicate {
}
if (V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- if (auto *CI = dyn_cast_or_null<ConstantInt>(C->getSplatValue()))
+ if (auto *CI = dyn_cast_or_null<ConstantInt>(
+ C->getSplatValue(/*AllowUndefs=*/false, /*AllowPoisons=*/true)))
if (this->isValue(CI->getValue())) {
Res = &CI->getValue();
return true;
@@ -432,8 +434,8 @@ template <typename Predicate> struct apf_pred_ty : public Predicate {
}
if (V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- if (auto *CI = dyn_cast_or_null<ConstantFP>(
- C->getSplatValue(/* AllowUndef */ true)))
+ if (auto *CI = dyn_cast_or_null<ConstantFP>(C->getSplatValue(
+ /*AllowUndefs=*/true, /*AllowPoisons=*/true)))
if (this->isValue(CI->getValue())) {
Res = &CI->getValue();
return true;
@@ -892,7 +894,8 @@ template <bool AllowUndefs> struct specific_intval {
const auto *CI = dyn_cast<ConstantInt>(V);
if (!CI && V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- CI = dyn_cast_or_null<ConstantInt>(C->getSplatValue(AllowUndefs));
+ CI = dyn_cast_or_null<ConstantInt>(
+ C->getSplatValue(AllowUndefs, /*AllowPoisons=*/true));
return CI && APInt::isSameValue(CI->getValue(), Val);
}
@@ -907,7 +910,8 @@ template <bool AllowUndefs> struct specific_intval64 {
const auto *CI = dyn_cast<ConstantInt>(V);
if (!CI && V->getType()->isVectorTy())
if (const auto *C = dyn_cast<Constant>(V))
- CI = dyn_cast_or_null<ConstantInt>(C->getSplatValue(AllowUndefs));
+ CI = dyn_cast_or_null<ConstantInt>(
+ C->getSplatValue(AllowUndefs, /*AllowPoisons=*/true));
return CI && CI->getValue() == Val;
}
diff --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp
index 45b359a94b3ab7..28e291a59eb89a 100644
--- a/llvm/lib/IR/Constants.cpp
+++ b/llvm/lib/IR/Constants.cpp
@@ -715,7 +715,7 @@ static bool constantIsDead(const Constant *C, bool RemoveDeadUsers) {
ReplaceableMetadataImpl::SalvageDebugInfo(*C);
const_cast<Constant *>(C)->destroyConstant();
}
-
+
return true;
}
@@ -1696,14 +1696,14 @@ void ConstantVector::destroyConstantImpl() {
getType()->getContext().pImpl->VectorConstants.remove(this);
}
-Constant *Constant::getSplatValue(bool AllowUndefs) const {
+Constant *Constant::getSplatValue(bool AllowUndefs, bool AllowPoisons) const {
assert(this->getType()->isVectorTy() && "Only valid for vectors!");
if (isa<ConstantAggregateZero>(this))
return getNullValue(cast<VectorType>(getType())->getElementType());
if (const ConstantDataVector *CV = dyn_cast<ConstantDataVector>(this))
return CV->getSplatValue();
if (const ConstantVector *CV = dyn_cast<ConstantVector>(this))
- return CV->getSplatValue(AllowUndefs);
+ return CV->getSplatValue(AllowUndefs, AllowPoisons);
// Check if this is a constant expression splat of the form returned by
// ConstantVector::getSplat()
@@ -1728,7 +1728,8 @@ Constant *Constant::getSplatValue(bool AllowUndefs) const {
return nullptr;
}
-Constant *ConstantVector::getSplatValue(bool AllowUndefs) const {
+Constant *ConstantVector::getSplatValue(bool AllowUndefs,
+ bool AllowPoisons) const {
// Check out first element.
Constant *Elt = getOperand(0);
// Then make sure all remaining elements point to the same value.
@@ -1737,16 +1738,28 @@ Constant *ConstantVector::getSplatValue(bool AllowUndefs) const {
if (OpC == Elt)
continue;
- // Strict mode: any mismatch is not a splat.
- if (!AllowUndefs)
+ if (!AllowPoisons && !AllowUndefs)
return nullptr;
- // Allow undefs mode: ignore undefined elements.
- if (isa<UndefValue>(OpC))
+ if (isa<PoisonValue>(OpC)) {
+ assert(isa<UndefValue>(OpC));
+ // Strict mode: any mismatch is not a splat.
+ if (!AllowPoisons && !AllowUndefs)
+ return nullptr;
+ // Allow poisons mode: ignore poison elements.
+ continue;
+ } else if (isa<UndefValue>(OpC)) {
+ // Strict mode: any mismatch is not a splat.
+ if (!AllowUndefs)
+ return nullptr;
+ // Allow undefs/poisons mode: ignore undefined elements.
continue;
+ }
// If we do not have a defined element yet, use the current operand.
- if (isa<UndefValue>(Elt))
+ if (AllowPoisons && isa<PoisonValue>(Elt))
+ Elt = OpC;
+ else if (AllowUndefs && isa<UndefValue>(Elt))
Elt = OpC;
if (OpC != Elt)
diff --git a/llvm/test/Analysis/ValueTracking/known-non-zero.ll b/llvm/test/Analysis/ValueTracking/known-non-zero.ll
index 0159050d925c3e..0ee09a131658de 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-zero.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-zero.ll
@@ -1189,11 +1189,7 @@ define <2 x i1> @cmp_excludes_zero_with_nonsplat_vec_wundef(<2 x i8> %a, <2 x i8
define <2 x i1> @cmp_excludes_zero_with_nonsplat_vec_wpoison(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @cmp_excludes_zero_with_nonsplat_vec_wpoison(
-; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i8> [[A:%.*]], <i8 1, i8 poison>
-; CHECK-NEXT: [[S:%.*]] = select <2 x i1> [[C]], <2 x i8> [[A]], <2 x i8> <i8 4, i8 5>
-; CHECK-NEXT: [[AND:%.*]] = or <2 x i8> [[S]], [[B:%.*]]
-; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[AND]], zeroinitializer
-; CHECK-NEXT: ret <2 x i1> [[R]]
+; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%c = icmp sge <2 x i8> %a, <i8 1, i8 poison>
%s = select <2 x i1> %c, <2 x i8> %a, <2 x i8> <i8 4, i8 5>
@@ -1314,8 +1310,8 @@ define i1 @range_attr(i8 range(i8 1, 0) %x, i8 %y) {
define i1 @neg_range_attr(i8 range(i8 -1, 1) %x, i8 %y) {
; CHECK-LABEL: @neg_range_attr(
-; CHECK-NEXT: [[I:%.*]] = or i8 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[I]], 0
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%or = or i8 %y, %x
@@ -1328,7 +1324,7 @@ declare range(i8 -1, 1) i8 @returns_contain_zero_range_helper()
define i1 @range_return(i8 %y) {
; CHECK-LABEL: @range_return(
-; CHECK-NEXT: [[I:%.*]] = call i8 @returns_non_zero_range_helper()
+; CHECK-NEXT: [[X:%.*]] = call i8 @returns_non_zero_range_helper()
; CHECK-NEXT: ret i1 false
;
%x = call i8 @returns_non_zero_range_helper()
@@ -1339,8 +1335,8 @@ define i1 @range_return(i8 %y) {
define i1 @neg_range_return(i8 %y) {
; CHECK-LABEL: @neg_range_return(
-; CHECK-NEXT: [[I:%.*]] = call i8 @returns_contain_zero_range_helper()
-; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[I]]
+; CHECK-NEXT: [[X:%.*]] = call i8 @returns_contain_zero_range_helper()
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[X]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1354,7 +1350,7 @@ declare i8 @returns_i8_helper()
define i1 @range_call(i8 %y) {
; CHECK-LABEL: @range_call(
-; CHECK-NEXT: [[I:%.*]] = call range(i8 1, 0) i8 @returns_i8_helper()
+; CHECK-NEXT: [[X:%.*]] = call range(i8 1, 0) i8 @returns_i8_helper()
; CHECK-NEXT: ret i1 false
;
%x = call range(i8 1, 0) i8 @returns_i8_helper()
@@ -1365,8 +1361,8 @@ define i1 @range_call(i8 %y) {
define i1 @neg_range_call(i8 %y) {
; CHECK-LABEL: @neg_range_call(
-; CHECK-NEXT: [[I:%.*]] = call range(i8 -1, 1) i8 @returns_i8_helper()
-; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[I]]
+; CHECK-NEXT: [[X:%.*]] = call range(i8 -1, 1) i8 @returns_i8_helper()
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[X]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1401,7 +1397,7 @@ declare range(i8 -1, 1) <2 x i8> @returns_contain_zero_range_helper_vec()
define <2 x i1> @range_return_vec(<2 x i8> %y) {
; CHECK-LABEL: @range_return_vec(
-; CHECK-NEXT: [[I:%.*]] = call <2 x i8> @returns_non_zero_range_helper_vec()
+; CHECK-NEXT: [[X:%.*]] = call <2 x i8> @returns_non_zero_range_helper_vec()
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%x = call <2 x i8> @returns_non_zero_range_helper_vec()
@@ -1412,8 +1408,8 @@ define <2 x i1> @range_return_vec(<2 x i8> %y) {
define <2 x i1> @neg_range_return_vec(<2 x i8> %y) {
; CHECK-LABEL: @neg_range_return_vec(
-; CHECK-NEXT: [[I:%.*]] = call <2 x i8> @returns_contain_zero_range_helper_vec()
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[Y:%.*]], [[I]]
+; CHECK-NEXT: [[X:%.*]] = call <2 x i8> @returns_contain_zero_range_helper_vec()
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[Y:%.*]], [[X]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[OR]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -1427,7 +1423,7 @@ declare <2 x i8> @returns_i8_helper_vec()
define <2 x i1> @range_call_vec(<2 x i8> %y) {
; CHECK-LABEL: @range_call_vec(
-; CHECK-NEXT: [[I:%.*]] = call range(i8 1, 0) <2 x i8> @returns_i8_helper_vec()
+; CHECK-NEXT: [[X:%.*]] = call range(i8 1, 0) <2 x i8> @returns_i8_helper_vec()
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%x = call range(i8 1, 0) <2 x i8> @returns_i8_helper_vec()
@@ -1438,8 +1434,8 @@ define <2 x i1> @range_call_vec(<2 x i8> %y) {
define <2 x i1> @neg_range_call_vec(<2 x i8> %y) {
; CHECK-LABEL: @neg_range_call_vec(
-; CHECK-NEXT: [[I:%.*]] = call range(i8 -1, 1) <2 x i8> @returns_i8_helper_vec()
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[Y:%.*]], [[I]]
+; CHECK-NEXT: [[X:%.*]] = call range(i8 -1, 1) <2 x i8> @returns_i8_helper_vec()
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[Y:%.*]], [[X]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[OR]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 39b4ad80550889..28d5b0bedc082f 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -1198,8 +1198,7 @@ define <2 x i32> @test44_vec_non_matching(<2 x i32> %A) {
define <2 x i32> @test44_vec_poison(<2 x i32> %A) {
; CHECK-LABEL: @test44_vec_poison(
-; CHECK-NEXT: [[B:%.*]] = or <2 x i32> [[A:%.*]], <i32 123, i32 poison>
-; CHECK-NEXT: [[C:%.*]] = add nsw <2 x i32> [[B]], <i32 -123, i32 poison>
+; CHECK-NEXT: [[C:%.*]] = and <2 x i32> [[A:%.*]], <i32 -124, i32 -124>
; CHECK-NEXT: ret <2 x i32> [[C]]
;
%B = or <2 x i32> %A, <i32 123, i32 poison>
@@ -3139,9 +3138,7 @@ define <2 x i32> @dec_zext_add_nonzero_vec_poison1(<2 x i8> %x) {
define <2 x i32> @dec_zext_add_nonzero_vec_poison2(<2 x i8> %x) {
; CHECK-LABEL: @dec_zext_add_nonzero_vec_poison2(
; CHECK-NEXT: [[O:%.*]] = or <2 x i8> [[X:%.*]], <i8 8, i8 8>
-; CHECK-NEXT: [[A:%.*]] = add nsw <2 x i8> [[O]], <i8 -1, i8 -1>
-; CHECK-NEXT: [[B:%.*]] = zext <2 x i8> [[A]] to <2 x i32>
-; CHECK-NEXT: [[C:%.*]] = add nuw nsw <2 x i32> [[B]], <i32 1, i32 poison>
+; CHECK-NEXT: [[C:%.*]] = zext <2 x i8> [[O]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[C]]
;
%o = or <2 x i8> %x, <i8 8, i8 8>
@@ -4018,8 +4015,8 @@ define i32 @add_reduce_sqr_sum_varC_invalid2(i32 %a, i32 %b) {
define i32 @fold_sext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_sext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4043,8 +4040,8 @@ define i32 @fold_sext_addition_fail(i8 %x) {
define i32 @fold_zext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4055,9 +4052,9 @@ define i32 @fold_zext_addition_or_disjoint(i8 %x) {
define i32 @fold_zext_addition_or_disjoint2(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint2(
-; CHECK-NEXT: [[XX:%.*]] = add nuw i8 [[X:%.*]], 4
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
-; CHECK-NEXT: ret i32 [[SE]]
+; CHECK-NEXT: [[TMP1:%.*]] = add nuw i8 [[X:%.*]], 4
+; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 18
%se = zext i8 %xx to i32
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index b5250fc1a7849d..738a4a6a4cfbfc 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -754,9 +754,9 @@ define <2 x i64> @test36_uniform(<2 x i32> %X) {
define <2 x i64> @test36_poison(<2 x i32> %X) {
; CHECK-LABEL: @test36_poison(
-; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT: [[ZSUB:%.*]] = add nuw nsw <2 x i64> [[ZEXT]], <i64 7, i64 poison>
-; CHECK-NEXT: [[RES:%.*]] = and <2 x i64> [[ZSUB]], <i64 240, i64 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 7>
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 240, i32 240>
+; CHECK-NEXT: [[RES:%.*]] = zext nneg <2 x i32> [[TMP2]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[RES]]
;
%zext = zext <2 x i32> %X to <2 x i64>
@@ -1681,8 +1681,8 @@ define <2 x i8> @flip_masked_bit_uniform(<2 x i8> %A) {
define <2 x i8> @flip_masked_bit_poison(<2 x i8> %A) {
; CHECK-LABEL: @flip_masked_bit_poison(
-; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[A:%.*]], <i8 -1, i8 -1>
-; CHECK-NEXT: [[C:%.*]] = and <2 x i8> [[TMP1]], <i8 16, i8 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[A:%.*]], <i8 16, i8 poison>
+; CHECK-NEXT: [[C:%.*]] = xor <2 x i8> [[TMP1]], <i8 16, i8 16>
; CHECK-NEXT: ret <2 x i8> [[C]]
;
%B = add <2 x i8> %A, <i8 16, i8 poison>
@@ -1960,8 +1960,8 @@ define i16 @invert_signbit_splat_mask(i8 %x, i16 %y) {
define <2 x i16> @invert_signbit_splat_mask_commute(<2 x i5> %x, <2 x i16> %p) {
; CHECK-LABEL: @invert_signbit_splat_mask_commute(
; CHECK-NEXT: [[Y:%.*]] = mul <2 x i16> [[P:%.*]], [[P]]
-; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt <2 x i5> [[X:%.*]], zeroinitializer
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[ISNEG]], <2 x i16> zeroinitializer, <2 x i16> [[Y]]
+; CHECK-NEXT: [[ISNOTNEG:%.*]] = icmp sgt <2 x i5> [[X:%.*]], <i5 -1, i5 -1>
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[ISNOTNEG]], <2 x i16> [[Y]], <2 x i16> zeroinitializer
; CHECK-NEXT: ret <2 x i16> [[R]]
;
%y = mul <2 x i16> %p, %p ; thwart complexity-based canonicalization
@@ -2122,7 +2122,7 @@ define <3 x i16> @shl_lshr_pow2_const_case1_non_uniform_vec_negative(<3 x i16> %
define <3 x i16> @shl_lshr_pow2_const_case1_poison1_vec(<3 x i16> %x) {
; CHECK-LABEL: @shl_lshr_pow2_const_case1_poison1_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 8, i16 4, i16 4>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 4, i16 4, i16 4>
; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 8, i16 8, i16 8>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
@@ -2146,9 +2146,8 @@ define <3 x i16> @shl_lshr_pow2_const_case1_poison2_vec(<3 x i16> %x) {
define <3 x i16> @shl_lshr_pow2_const_case1_poison3_vec(<3 x i16> %x) {
; CHECK-LABEL: @shl_lshr_pow2_const_case1_poison3_vec(
-; CHECK-NEXT: [[SHL:%.*]] = shl <3 x i16> <i16 16, i16 16, i16 16>, [[X:%.*]]
-; CHECK-NEXT: [[LSHR:%.*]] = lshr <3 x i16> [[SHL]], <i16 5, i16 5, i16 5>
-; CHECK-NEXT: [[R:%.*]] = and <3 x i16> [[LSHR]], <i16 poison, i16 8, i16 8>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 4, i16 4, i16 4>
+; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 8, i16 8, i16 8>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
%shl = shl <3 x i16> <i16 16, i16 16, i16 16>, %x
@@ -2418,7 +2417,7 @@ define <3 x i16> @lshr_shl_pow2_const_case1_non_uniform_vec_negative(<3 x i16> %
define <3 x i16> @lshr_shl_pow2_const_case1_poison1_vec(<3 x i16> %x) {
; CHECK-LABEL: @lshr_shl_pow2_const_case1_poison1_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 -1, i16 12, i16 12>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 12, i16 12, i16 12>
; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 128, i16 128, i16 128>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
@@ -2443,9 +2442,8 @@ define <3 x i16> @lshr_shl_pow2_const_case1_poison2_vec(<3 x i16> %x) {
define <3 x i16> @lshr_shl_pow2_const_case1_poison3_vec(<3 x i16> %x) {
; CHECK-LABEL: @lshr_shl_pow2_const_case1_poison3_vec(
-; CHECK-NEXT: [[LSHR:%.*]] = lshr <3 x i16> <i16 8192, i16 8192, i16 8192>, [[X:%.*]]
-; CHECK-NEXT: [[SHL:%.*]] = shl <3 x i16> [[LSHR]], <i16 6, i16 6, i16 6>
-; CHECK-NEXT: [[R:%.*]] = and <3 x i16> [[SHL]], <i16 poison, i16 128, i16 128>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i16> [[X:%.*]], <i16 12, i16 12, i16 12>
+; CHECK-NEXT: [[R:%.*]] = select <3 x i1> [[TMP1]], <3 x i16> <i16 128, i16 128, i16 128>, <3 x i16> zeroinitializer
; CHECK-NEXT: ret <3 x i16> [[R]]
;
%lshr = lshr <3 x i16> <i16 8192, i16 8192, i16 8192>, %x
diff --git a/llvm/test/Transforms/InstCombine/ashr-lshr.ll b/llvm/test/Transforms/InstCombine/ashr-lshr.ll
index ac206dc7999dd2..cf2ecdde77a399 100644
--- a/llvm/test/Transforms/InstCombine/ashr-lshr.ll
+++ b/llvm/test/Transforms/InstCombine/ashr-lshr.ll
@@ -500,8 +500,8 @@ define <3 x i42> @lshr_sub_nsw_splat(<3 x i42> %x, <3 x i42> %y) {
define <3 x i42> @lshr_sub_nsw_splat_poison(<3 x i42> %x, <3 x i42> %y) {
; CHECK-LABEL: @lshr_sub_nsw_splat_poison(
-; CHECK-NEXT: [[SUB:%.*]] = sub nsw <3 x i42> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[SHR:%.*]] = lshr <3 x i42> [[SUB]], <i42 41, i42 poison, i42 41>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <3 x i42> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[SHR:%.*]] = zext <3 x i1> [[TMP1]] to <3 x i42>
; CHECK-NEXT: ret <3 x i42> [[SHR]]
;
%sub = sub nsw <3 x i42> %x, %y
@@ -574,8 +574,8 @@ define <3 x i43> @ashr_sub_nsw_splat(<3 x i43> %x, <3 x i43> %y) {
define <3 x i43> @ashr_sub_nsw_splat_poison(<3 x i43> %x, <3 x i43> %y) {
; CHECK-LABEL: @ashr_sub_nsw_splat_poison(
-; CHECK-NEXT: [[SUB:%.*]] = sub nsw <3 x i43> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[SHR:%.*]] = ashr <3 x i43> [[SUB]], <i43 42, i43 poison, i43 42>
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <3 x i43> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[SHR:%.*]] = sext <3 x i1> [[TMP1]] to <3 x i43>
; CHECK-NEXT: ret <3 x i43> [[SHR]]
;
%sub = sub nsw <3 x i43> %x, %y
diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll
index 04a3e8931e62c9..63d88e04653212 100644
--- a/llvm/test/Transforms/InstCombine/cast.ll
+++ b/llvm/test/Transforms/InstCombine/cast.ll
@@ -512,8 +512,8 @@ define <2 x i16> @test40vec_poison(<2 x i16> %a) {
; ALL-LABEL: @test40vec_poison(
; ALL-NEXT: [[T21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 poison>
; ALL-NEXT: [[T5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 poison>
-; ALL-NEXT: [[R:%.*]] = or disjoint <2 x i16> [[T21]], [[T5]]
-; ALL-NEXT: ret <2 x i16> [[R]]
+; ALL-NEXT: [[T32:%.*]] = or disjoint <2 x i16> [[T21]], [[T5]]
+; ALL-NEXT: ret <2 x i16> [[T32]]
;
%t = zext <2 x i16> %a to <2 x i32>
%t21 = lshr <2 x i32> %t, <i32 9, i32 poison>
@@ -2014,8 +2014,8 @@ define <2 x i8> @trunc_lshr_zext_uniform(<2 x i8> %A) {
define <2 x i8> @trunc_lshr_zext_uniform_poison(<2 x i8> %A) {
; ALL-LABEL: @trunc_lshr_zext_uniform_poison(
-; ALL-NEXT: [[D:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 poison>
-; ALL-NEXT: ret <2 x i8> [[D]]
+; ALL-NEXT: [[TMP1:%.*]] = lshr <2 x i8> [[A:%.*]], <i8 6, i8 6>
+; ALL-NEXT: ret <2 x i8> [[TMP1]]
;
%B = zext <2 x i8> %A to <2 x i32>
%C = lshr <2 x i32> %B, <i32 6, i32 poison>
@@ -2036,8 +2036,8 @@ define <2 x i8> @trunc_lshr_zext_nonuniform(<2 x i8> %A) {
define <3 x i8> @trunc_lshr_zext_nonuniform_poison(<3 x i8> %A) {
; ALL-LABEL: @trunc_lshr_zext_nonuniform_poison(
-; ALL-NEXT: [[D:%.*]] = lshr <3 x i8> [[A:%.*]], <i8 6, i8 2, i8 poison>
-; ALL-NEXT: ret <3 x i8> [[D]]
+; ALL-NEXT: [[C:%.*]] = lshr <3 x i8> [[A:%.*]], <i8 6, i8 2, i8 poison>
+; ALL-NEXT: ret <3 x i8> [[C]]
;
%B = zext <3 x i8> %A to <3 x i32>
%C = lshr <3 x i32> %B, <i32 6, i32 2, i32 poison>
diff --git a/llvm/test/Transforms/InstCombine/getelementptr.ll b/llvm/test/Transforms/InstCombine/getelementptr.ll
index 04b0c196ab5108..00207ce9fc8ee5 100644
--- a/llvm/test/Transforms/InstCombine/getelementptr.ll
+++ b/llvm/test/Transforms/InstCombine/getelementptr.ll
@@ -233,9 +233,8 @@ define <2 x i1> @test13_vector(<2 x i64> %X, <2 x ptr> %P) nounwind {
define <2 x i1> @test13_vector2(i64 %X, <2 x ptr> %P) nounwind {
; CHECK-LABEL: @test13_vector2(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], <i64 -4, i64 poison>
-; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[DOTSPLATINSERT]], <i64 -1, i64 -1>
+; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP1]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%A = getelementptr inbounds %S, <2 x ptr> %P, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 1>, i64 %X
@@ -247,7 +246,7 @@ define <2 x i1> @test13_vector2(i64 %X, <2 x ptr> %P) nounwind {
define <2 x i1> @test13_fixed_fixed(i64 %X, ptr %P, <2 x i64> %y) nounwind {
; CHECK-LABEL: @test13_fixed_fixed(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 3>
; CHECK-NEXT: [[A_IDX:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw <2 x i64> [[Y:%.*]], <i64 4, i64 4>
; CHECK-NEXT: [[C:%.*]] = icmp eq <2 x i64> [[A_IDX]], [[B_IDX]]
@@ -262,7 +261,7 @@ define <2 x i1> @test13_fixed_fixed(i64 %X, ptr %P, <2 x i64> %y) nounwind {
define <2 x i1> @test13_fixed_scalable(i64 %X, ptr %P, <2 x i64> %y) nounwind {
; CHECK-LABEL: @test13_fixed_scalable(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw <2 x i64> [[DOTSPLATINSERT]], <i64 3, i64 3>
; CHECK-NEXT: [[A_IDX:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 4
@@ -301,9 +300,8 @@ define <vscale x 2 x i1> @test13_scalable_scalable(i64 %X, ptr %P, <vscale x 2 x
define <2 x i1> @test13_vector3(i64 %X, <2 x ptr> %P) nounwind {
; CHECK-LABEL: @test13_vector3(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[X:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], <i64 4, i64 poison>
-; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[DOTSPLATINSERT]], <i64 1, i64 1>
+; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP1]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%A = getelementptr inbounds %S, <2 x ptr> %P, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 1>, i64 %X
diff --git a/llvm/test/Transforms/InstCombine/icmp-logical.ll b/llvm/test/Transforms/InstCombine/icmp-logical.ll
index 4690ead483a5ba..990c4add891321 100644
--- a/llvm/test/Transforms/InstCombine/icmp-logical.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-logical.ll
@@ -1778,9 +1778,9 @@ define i1 @masked_icmps_bmask_notmixed_or(i32 %A) {
define <2 x i1> @masked_icmps_bmask_notmixed_or_vec(<2 x i8> %A) {
; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
-; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 3, i8 3>
-; CHECK-NEXT: ret <2 x i1> [[RES]]
+; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 3>
+; CHECK-NEXT: ret <2 x i1> [[TST1]]
;
%mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
%tst1 = icmp eq <2 x i8> %mask1, <i8 3, i8 3> ; 0x03
@@ -1792,10 +1792,8 @@ define <2 x i1> @masked_icmps_bmask_notmixed_or_vec(<2 x i8> %A) {
define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison1(<2 x i8> %A) {
; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison1(
-; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
-; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 poison>
-; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 -13>
-; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 3, i8 3>
; CHECK-NEXT: ret <2 x i1> [[RES]]
;
%mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
@@ -1808,10 +1806,8 @@ define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison1(<2 x i8> %A) {
define <2 x i1> @masked_icmps_bmask_notmixed_or_vec_poison2(<2 x i8> %A) {
; CHECK-LABEL: @masked_icmps_bmask_notmixed_or_vec_poison2(
-; CHECK-NEXT: [[MASK1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
-; CHECK-NEXT: [[TST1:%.*]] = icmp eq <2 x i8> [[MASK1]], <i8 3, i8 3>
-; CHECK-NEXT: [[TST2:%.*]] = icmp eq <2 x i8> [[A]], <i8 -13, i8 poison>
-; CHECK-NEXT: [[RES:%.*]] = or <2 x i1> [[TST1]], [[TST2]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[A:%.*]], <i8 15, i8 15>
+; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 3, i8 3>
; CHECK-NEXT: ret <2 x i1> [[RES]]
;
%mask1 = and <2 x i8> %A, <i8 15, i8 15> ; 0x0f
diff --git a/llvm/test/Transforms/InstCombine/icmp-range.ll b/llvm/test/Transforms/InstCombine/icmp-range.ll
index 9ed2f2a4860c62..41002f11e91de4 100644
--- a/llvm/test/Transforms/InstCombine/icmp-range.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-range.ll
@@ -152,7 +152,7 @@ define i1 @test_two_ranges(ptr nocapture readonly %arg1, ptr nocapture readonly
; Values' ranges overlap each other, so it can not be simplified.
define i1 @test_two_attribute_ranges(i32 range(i32 5, 10) %arg1, i32 range(i32 8, 16) %arg2) {
; CHECK-LABEL: @test_two_attribute_ranges(
-; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[ARG1:%.*]], [[ARG2:%.*]]
+; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: ret i1 [[RVAL]]
;
%rval = icmp ult i32 %arg2, %arg1
@@ -249,7 +249,7 @@ define <2 x i1> @test_two_ranges_vec_true(ptr nocapture readonly %arg1, ptr noca
; Values' ranges overlap each other, so it can not be simplified.
define <2 x i1> @test_two_argument_ranges_vec(<2 x i32> range(i32 5, 10) %arg1, <2 x i32> range(i32 8, 16) %arg2) {
; CHECK-LABEL: @test_two_argument_ranges_vec(
-; CHECK-NEXT: [[RVAL:%.*]] = icmp ult <2 x i32> [[VAL2:%.*]], [[VAL1:%.*]]
+; CHECK-NEXT: [[RVAL:%.*]] = icmp ult <2 x i32> [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: ret <2 x i1> [[RVAL]]
;
%rval = icmp ult <2 x i32> %arg2, %arg1
@@ -281,9 +281,9 @@ declare range(i32 1, 6) i32 @create_range3()
; Values' ranges overlap each other, so it can not be simplified.
define i1 @test_two_return_attribute_ranges_not_simplified() {
; CHECK-LABEL: @test_two_return_attribute_ranges_not_simplified(
-; CHECK-NEXT: [[ARG2:%.*]] = call range(i32 5, 10) i32 @create_range1()
-; CHECK-NEXT: [[ARG1:%.*]] = call i32 @create_range2()
-; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[ARG1]], [[ARG2]]
+; CHECK-NEXT: [[VAL1:%.*]] = call range(i32 5, 10) i32 @create_range1()
+; CHECK-NEXT: [[VAL2:%.*]] = call i32 @create_range2()
+; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
; CHECK-NEXT: ret i1 [[RVAL]]
;
%val1 = call range(i32 5, 10) i32 @create_range1()
@@ -296,7 +296,7 @@ define i1 @test_two_return_attribute_ranges_not_simplified() {
define i1 @test_two_return_attribute_ranges_one_in_call() {
; CHECK-LABEL: @test_two_return_attribute_ranges_one_in_call(
; CHECK-NEXT: [[VAL1:%.*]] = call range(i32 1, 6) i32 @create_range1()
-; CHECK-NEXT: [[ARG1:%.*]] = call i32 @create_range2()
+; CHECK-NEXT: [[VAL2:%.*]] = call i32 @create_range2()
; CHECK-NEXT: ret i1 false
;
%val1 = call range(i32 1, 6) i32 @create_range1()
@@ -309,7 +309,7 @@ define i1 @test_two_return_attribute_ranges_one_in_call() {
define i1 @test_two_return_attribute_ranges() {
; CHECK-LABEL: @test_two_return_attribute_ranges(
; CHECK-NEXT: [[VAL1:%.*]] = call i32 @create_range3()
-; CHECK-NEXT: [[ARG1:%.*]] = call i32 @create_range2()
+; CHECK-NEXT: [[VAL2:%.*]] = call i32 @create_range2()
; CHECK-NEXT: ret i1 false
;
%val1 = call i32 @create_range3()
@@ -899,8 +899,8 @@ define i1 @zext_sext_add_icmp_ne_minus1(i1 %a, i1 %b) {
define i1 @zext_sext_add_icmp_sgt_minus1(i1 %a, i1 %b) {
; CHECK-LABEL: @zext_sext_add_icmp_sgt_minus1(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[B:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = or i1 [[TMP1]], [[A:%.*]]
+; CHECK-NEXT: [[B_NOT:%.*]] = xor i1 [[B:%.*]], true
+; CHECK-NEXT: [[R:%.*]] = or i1 [[B_NOT]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%zext.a = zext i1 %a to i8
@@ -945,8 +945,8 @@ define i1 @zext_sext_add_icmp_sgt_0(i1 %a, i1 %b) {
define i1 @zext_sext_add_icmp_slt_0(i1 %a, i1 %b) {
; CHECK-LABEL: @zext_sext_add_icmp_slt_0(
; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[A:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i1 [[TMP2]]
;
%zext.a = zext i1 %a to i8
%sext.b = sext i1 %b to i8
@@ -1005,8 +1005,8 @@ define i1 @zext_sext_add_icmp_slt_1(i1 %a, i1 %b) {
define i1 @zext_sext_add_icmp_ugt_1(i1 %a, i1 %b) {
; CHECK-LABEL: @zext_sext_add_icmp_ugt_1(
; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[A:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[B:%.*]]
+; CHECK-NEXT: ret i1 [[TMP2]]
;
%zext.a = zext i1 %a to i8
%sext.b = sext i1 %b to i8
@@ -1030,10 +1030,8 @@ define <2 x i1> @vector_zext_sext_add_icmp_slt_1(<2 x i1> %a, <2 x i1> %b) {
define <2 x i1> @vector_zext_sext_add_icmp_slt_1_poison(<2 x i1> %a, <2 x i1> %b) {
; CHECK-LABEL: @vector_zext_sext_add_icmp_slt_1_poison(
-; CHECK-NEXT: [[ZEXT_A:%.*]] = zext <2 x i1> [[A:%.*]] to <2 x i8>
-; CHECK-NEXT: [[SEXT_B:%.*]] = sext <2 x i1> [[B:%.*]] to <2 x i8>
-; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i8> [[ZEXT_A]], [[SEXT_B]]
-; CHECK-NEXT: [[R:%.*]] = icmp slt <2 x i8> [[ADD]], <i8 1, i8 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[TMP1]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%zext.a = zext <2 x i1> %a to <2 x i8>
diff --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll
index 71b4f5a970c2f6..1d7ea3096c647c 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll
@@ -1408,9 +1408,8 @@ define i1 @same_signbit_use3(i8 %x, i8 %y) {
define <2 x i1> @same_signbit_poison_elts(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @same_signbit_poison_elts(
-; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
-; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], <i8 -1, i8 -1>
; CHECK-NEXT: ret <2 x i1> [[R1]]
;
%xsign = lshr <2 x i8> %x, <i8 7, i8 poison>
@@ -1569,9 +1568,8 @@ define i1 @same_signbit_use3_signed(i8 %x, i8 %y) {
define <2 x i1> @same_signbit_poison_elts_signed(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @same_signbit_poison_elts_signed(
-; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
-; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], <i8 -1, i8 -1>
; CHECK-NEXT: ret <2 x i1> [[R1]]
;
%xsign = ashr <2 x i8> %x, <i8 7, i8 poison>
diff --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll
index 7d611ba188d6b4..b4c285df33862d 100644
--- a/llvm/test/Transforms/InstCombine/lshr.ll
+++ b/llvm/test/Transforms/InstCombine/lshr.ll
@@ -891,9 +891,8 @@ define <2 x i64> @narrow_bswap_splat(<2 x i16> %x) {
define <2 x i64> @narrow_bswap_splat_poison_elt(<2 x i16> %x) {
; CHECK-LABEL: @narrow_bswap_splat_poison_elt(
-; CHECK-NEXT: [[Z:%.*]] = zext <2 x i16> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT: [[B:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[Z]])
-; CHECK-NEXT: [[S:%.*]] = lshr exact <2 x i64> [[B]], <i64 48, i64 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[X:%.*]])
+; CHECK-NEXT: [[S:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[S]]
;
%z = zext <2 x i16> %x to <2 x i64>
diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll
index 8b47dc7a28079e..05e8de538eb6d6 100644
--- a/llvm/test/Transforms/InstCombine/minmax-fold.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll
@@ -1360,11 +1360,10 @@ define i8 @PR14613_smax(i8 %x) {
define i8 @PR46271(<2 x i8> %x) {
; CHECK-LABEL: @PR46271(
-; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i8> [[X:%.*]], <i8 poison, i8 -1>
-; CHECK-NEXT: [[A_INV:%.*]] = icmp slt <2 x i8> [[X]], zeroinitializer
-; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[A_INV]], <2 x i8> <i8 poison, i8 0>, <2 x i8> [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.smax.v2i8(<2 x i8> [[X:%.*]], <2 x i8> <i8 poison, i8 -1>)
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i8> [[TMP1]], i64 1
-; CHECK-NEXT: ret i8 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP2]], -1
+; CHECK-NEXT: ret i8 [[R]]
;
%a = icmp sgt <2 x i8> %x, <i8 -1, i8 -1>
%b = select <2 x i1> %a, <2 x i8> %x, <2 x i8> <i8 poison, i8 -1>
diff --git a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
index f47c5577075cbd..ad872b185611c5 100644
--- a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
+++ b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
@@ -976,7 +976,7 @@ define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {
define <2 x i32> @mulsub1_vec_nonuniform_poison(<2 x i32> %a0, <2 x i32> %a1) {
; CHECK-LABEL: @mulsub1_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> %a1, %a0
@@ -1020,7 +1020,7 @@ define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @mulsub2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @mulsub2_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> <i32 16, i32 32>, %a0
@@ -1064,7 +1064,7 @@ define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @muladd2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @muladd2_vec_nonuniform_poison(
; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%add = add <2 x i32> %a0, <i32 16, i32 32>
diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index 227ca4a6d5cfad..437338fd74aad9 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -1001,8 +1001,7 @@ define <2 x i32> @PR57278_shl_vec(<2 x i32> %v1) {
; TODO: vector with poison should also be supported, https://alive2.llvm.org/ce/z/XYpv9q
define <2 x i32> @PR57278_shl_vec_poison(<2 x i32> %v1) {
; CHECK-LABEL: @PR57278_shl_vec_poison(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw <2 x i32> [[V1:%.*]], <i32 2, i32 poison>
-; CHECK-NEXT: [[TMP1:%.*]] = mul nuw <2 x i32> [[SHL]], <i32 3, i32 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = mul nuw <2 x i32> [[V1:%.*]], <i32 12, i32 poison>
; CHECK-NEXT: [[MUL:%.*]] = add nuw <2 x i32> [[TMP1]], <i32 9, i32 poison>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
@@ -1755,7 +1754,7 @@ define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {
define <2 x i32> @mulsub1_vec_nonuniform_poison(<2 x i32> %a0, <2 x i32> %a1) {
; CHECK-LABEL: @mulsub1_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> %a1, %a0
@@ -1799,7 +1798,7 @@ define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @mulsub2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @mulsub2_vec_nonuniform_poison(
; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%sub = sub <2 x i32> <i32 16, i32 32>, %a0
@@ -1823,7 +1822,7 @@ define i8 @mulsub_nsw(i8 %a1, i8 %a2) {
define <2 x i8> @mulsub_nsw_poison(<2 x i8> %a1, <2 x i8> %a2) {
; CHECK-LABEL: @mulsub_nsw_poison(
; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw <2 x i8> [[A2:%.*]], [[A1:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i8> [[A_NEG]], <i8 1, i8 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i8> [[A_NEG]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i8> [[MUL]]
;
%a = sub nsw <2 x i8> %a1, %a2
@@ -1867,7 +1866,7 @@ define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {
define <2 x i32> @muladd2_vec_nonuniform_poison(<2 x i32> %a0) {
; CHECK-LABEL: @muladd2_vec_nonuniform_poison(
; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0>
+; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i32> [[MUL]]
;
%add = add <2 x i32> %a0, <i32 16, i32 32>
@@ -2061,8 +2060,8 @@ define i32 @mul_sext_icmp_with_zero(i32 %x) {
define i32 @test_mul_sext_bool(i1 %x, i32 %y) {
; CHECK-LABEL: @test_mul_sext_bool(
-; CHECK-NEXT: [[Y_NEG:%.*]] = sub i32 0, [[Y:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[TMP1]], i32 0
; CHECK-NEXT: ret i32 [[MUL]]
;
%sext = sext i1 %x to i32
@@ -2072,8 +2071,8 @@ define i32 @test_mul_sext_bool(i1 %x, i32 %y) {
define i32 @test_mul_sext_bool_nuw(i1 %x, i32 %y) {
; CHECK-LABEL: @test_mul_sext_bool_nuw(
-; CHECK-NEXT: [[Y_NEG:%.*]] = sub i32 0, [[Y:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[TMP1]], i32 0
; CHECK-NEXT: ret i32 [[MUL]]
;
%sext = sext i1 %x to i32
@@ -2083,8 +2082,8 @@ define i32 @test_mul_sext_bool_nuw(i1 %x, i32 %y) {
define i32 @test_mul_sext_bool_nsw(i1 %x, i32 %y) {
; CHECK-LABEL: @test_mul_sext_bool_nsw(
-; CHECK-NEXT: [[Y_NEG:%.*]] = sub nsw i32 0, [[Y:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[TMP1]], i32 0
; CHECK-NEXT: ret i32 [[MUL]]
;
%sext = sext i1 %x to i32
@@ -2094,8 +2093,8 @@ define i32 @test_mul_sext_bool_nsw(i1 %x, i32 %y) {
define i32 @test_mul_sext_bool_nuw_nsw(i1 %x, i32 %y) {
; CHECK-LABEL: @test_mul_sext_bool_nuw_nsw(
-; CHECK-NEXT: [[Y_NEG:%.*]] = sub nsw i32 0, [[Y:%.*]]
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[TMP1]], i32 0
; CHECK-NEXT: ret i32 [[MUL]]
;
%sext = sext i1 %x to i32
@@ -2106,8 +2105,8 @@ define i32 @test_mul_sext_bool_nuw_nsw(i1 %x, i32 %y) {
define i32 @test_mul_sext_bool_commuted(i1 %x, i32 %y) {
; CHECK-LABEL: @test_mul_sext_bool_commuted(
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -2
-; CHECK-NEXT: [[YY_NEG1:%.*]] = add i32 [[TMP1]], 1
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[YY_NEG1]], i32 0
+; CHECK-NEXT: [[YY_NEG:%.*]] = add i32 [[TMP1]], 1
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[YY_NEG]], i32 0
; CHECK-NEXT: ret i32 [[MUL]]
;
%yy = xor i32 %y, 1
diff --git a/llvm/test/Transforms/InstCombine/opaque-ptr.ll b/llvm/test/Transforms/InstCombine/opaque-ptr.ll
index 4d38e2cd37c959..02a57636114790 100644
--- a/llvm/test/Transforms/InstCombine/opaque-ptr.ll
+++ b/llvm/test/Transforms/InstCombine/opaque-ptr.ll
@@ -346,9 +346,8 @@ define i1 @compare_gep_with_base(ptr %p, i64 %idx) {
define <2 x i1> @compare_gep_with_base_vector1(<2 x ptr> %p, i64 %idx) {
; CHECK-LABEL: @compare_gep_with_base_vector1(
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[IDX:%.*]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[DOTSPLATINSERT]], <i64 2, i64 0>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i64> [[TMP1]], zeroinitializer
-; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i64> [[DOTSPLATINSERT]], zeroinitializer
+; CHECK-NEXT: [[C:%.*]] = shufflevector <2 x i1> [[TMP1]], <2 x i1> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%gep = getelementptr inbounds i32, <2 x ptr> %p, i64 %idx
diff --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll
index 6e2085a8bb6c7d..c86943821e92f6 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -568,10 +568,8 @@ define <2 x i1> @test37_uniform(<2 x i32> %x) {
define <2 x i1> @test37_poison(<2 x i32> %x) {
; CHECK-LABEL: @test37_poison(
-; CHECK-NEXT: [[ADD1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 poison>
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i32> [[ADD1]], <i32 30, i32 poison>
-; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <2 x i32> [[X]], <i32 23, i32 poison>
-; CHECK-NEXT: [[RET1:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 7, i32 7>
+; CHECK-NEXT: [[RET1:%.*]] = icmp ult <2 x i32> [[TMP1]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[RET1]]
;
%add1 = add <2 x i32> %x, <i32 7, i32 poison>
@@ -876,11 +874,9 @@ define <2 x i1> @test46_uniform(<2 x i8> %c) {
define <2 x i1> @test46_poison(<2 x i8> %c) {
; CHECK-LABEL: @test46_poison(
-; CHECK-NEXT: [[C_OFF:%.*]] = add <2 x i8> [[C:%.*]], <i8 -97, i8 poison>
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult <2 x i8> [[C_OFF]], <i8 26, i8 poison>
-; CHECK-NEXT: [[C_OFF17:%.*]] = add <2 x i8> [[C]], <i8 -65, i8 poison>
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i8> [[C_OFF17]], <i8 26, i8 poison>
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CMP1]], [[CMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[C:%.*]], <i8 -33, i8 -33>
+; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i8> [[TMP1]], <i8 -65, i8 -65>
+; CHECK-NEXT: [[OR:%.*]] = icmp ult <2 x i8> [[TMP2]], <i8 26, i8 26>
; CHECK-NEXT: ret <2 x i1> [[OR]]
;
%c.off = add <2 x i8> %c, <i8 -97, i8 poison>
diff --git a/llvm/test/Transforms/InstCombine/saturating-add-sub.ll b/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
index 57977a72cd08fd..52bed61dd84b02 100644
--- a/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
+++ b/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
@@ -1818,9 +1818,7 @@ define <4 x i32> @uadd_sat_constant_vec_commute(<4 x i32> %x) {
define <4 x i32> @uadd_sat_constant_vec_commute_undefs(<4 x i32> %x) {
; CHECK-LABEL: @uadd_sat_constant_vec_commute_undefs(
-; CHECK-NEXT: [[A:%.*]] = add <4 x i32> [[X:%.*]], <i32 42, i32 42, i32 42, i32 poison>
-; CHECK-NEXT: [[C:%.*]] = icmp ult <4 x i32> [[X]], <i32 -43, i32 -43, i32 poison, i32 -43>
-; CHECK-NEXT: [[R:%.*]] = select <4 x i1> [[C]], <4 x i32> [[A]], <4 x i32> <i32 -1, i32 poison, i32 -1, i32 -1>
+; CHECK-NEXT: [[R:%.*]] = call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> [[X:%.*]], <4 x i32> <i32 42, i32 42, i32 42, i32 42>)
; CHECK-NEXT: ret <4 x i32> [[R]]
;
%a = add <4 x i32> %x, <i32 42, i32 42, i32 42, i32 poison>
diff --git a/llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll b/llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
index 9efc30cc9d916e..60ab85fbb6f6ab 100644
--- a/llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
+++ b/llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
@@ -45,7 +45,7 @@ define <2 x i16> @t1_vec_splat(<2 x i32> %x, <2 x i16> %y) {
define <3 x i16> @t3_vec_nonsplat_poison0(<3 x i32> %x, <3 x i16> %y) {
; CHECK-LABEL: @t3_vec_nonsplat_poison0(
; CHECK-NEXT: [[TMP1:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 31, i32 poison, i32 31>
-; CHECK-NEXT: [[T5:%.*]] = trunc <3 x i32> [[TMP1]] to <3 x i16>
+; CHECK-NEXT: [[T5:%.*]] = trunc nsw <3 x i32> [[TMP1]] to <3 x i16>
; CHECK-NEXT: ret <3 x i16> [[T5]]
;
%t0 = sub <3 x i16> <i16 32, i16 poison, i16 32>, %y
@@ -60,7 +60,7 @@ define <3 x i16> @t3_vec_nonsplat_poison0(<3 x i32> %x, <3 x i16> %y) {
define <3 x i16> @t4_vec_nonsplat_poison1(<3 x i32> %x, <3 x i16> %y) {
; CHECK-LABEL: @t4_vec_nonsplat_poison1(
; CHECK-NEXT: [[TMP1:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 31, i32 poison, i32 31>
-; CHECK-NEXT: [[T5:%.*]] = trunc <3 x i32> [[TMP1]] to <3 x i16>
+; CHECK-NEXT: [[T5:%.*]] = trunc nsw <3 x i32> [[TMP1]] to <3 x i16>
; CHECK-NEXT: ret <3 x i16> [[T5]]
;
%t0 = sub <3 x i16> <i16 32, i16 32, i16 32>, %y
@@ -75,7 +75,7 @@ define <3 x i16> @t4_vec_nonsplat_poison1(<3 x i32> %x, <3 x i16> %y) {
define <3 x i16> @t5_vec_nonsplat_poison1(<3 x i32> %x, <3 x i16> %y) {
; CHECK-LABEL: @t5_vec_nonsplat_poison1(
; CHECK-NEXT: [[TMP1:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 31, i32 poison, i32 31>
-; CHECK-NEXT: [[T5:%.*]] = trunc <3 x i32> [[TMP1]] to <3 x i16>
+; CHECK-NEXT: [[T5:%.*]] = trunc nsw <3 x i32> [[TMP1]] to <3 x i16>
; CHECK-NEXT: ret <3 x i16> [[T5]]
;
%t0 = sub <3 x i16> <i16 32, i16 poison, i16 32>, %y
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index bb8661919c89f5..0e82fc5a716752 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -465,10 +465,9 @@ entry:
define <2 x i32> @test29_poison(<2 x i64> %d18) {
; CHECK-LABEL: @test29_poison(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[I916:%.*]] = lshr <2 x i64> [[D18:%.*]], <i64 32, i64 poison>
-; CHECK-NEXT: [[I917:%.*]] = trunc nuw <2 x i64> [[I916]] to <2 x i32>
-; CHECK-NEXT: [[I10:%.*]] = lshr <2 x i32> [[I917]], <i32 31, i32 poison>
-; CHECK-NEXT: ret <2 x i32> [[I10]]
+; CHECK-NEXT: [[SUM_SHIFT:%.*]] = lshr <2 x i64> [[D18:%.*]], <i64 63, i64 63>
+; CHECK-NEXT: [[I101:%.*]] = trunc nuw nsw <2 x i64> [[SUM_SHIFT]] to <2 x i32>
+; CHECK-NEXT: ret <2 x i32> [[I101]]
;
entry:
%i916 = lshr <2 x i64> %d18, <i64 32, i64 poison>
@@ -658,8 +657,8 @@ define i8 @test39(i32 %a0) {
; CHECK-NEXT: [[I51:%.*]] = xor i8 [[I50]], [[I5]]
; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i8 [[I5]], 3
; CHECK-NEXT: [[I54:%.*]] = and i8 [[TMP0]], 16
-; CHECK-NEXT: [[I551:%.*]] = or disjoint i8 [[I54]], [[I51]]
-; CHECK-NEXT: ret i8 [[I551]]
+; CHECK-NEXT: [[I55:%.*]] = or disjoint i8 [[I54]], [[I51]]
+; CHECK-NEXT: ret i8 [[I55]]
;
entry:
%i4 = trunc i32 %a0 to i8
@@ -1751,14 +1750,14 @@ define void @ashr_out_of_range_1(ptr %A) {
; CHECK-NEXT: [[L:%.*]] = load i177, ptr [[A:%.*]], align 4
; CHECK-NEXT: [[L_FROZEN:%.*]] = freeze i177 [[L]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L_FROZEN]], -1
-; CHECK-NEXT: [[TMP6:%.*]] = trunc i177 [[L_FROZEN]] to i64
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 0, i64 [[TMP6]]
-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i177, ptr [[A]], i64 [[TMP2]]
-; CHECK-NEXT: [[G11:%.*]] = getelementptr i8, ptr [[TMP3]], i64 -24
-; CHECK-NEXT: [[TMP4:%.*]] = sext i1 [[TMP1]] to i64
-; CHECK-NEXT: [[G62:%.*]] = getelementptr i177, ptr [[G11]], i64 [[TMP4]]
-; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i177 [[L_FROZEN]], -1
-; CHECK-NEXT: [[B28:%.*]] = select i1 [[TMP5]], i177 0, i177 [[L_FROZEN]]
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i177 [[L_FROZEN]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i64 0, i64 [[TMP2]]
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i177, ptr [[A]], i64 [[TMP3]]
+; CHECK-NEXT: [[G11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 -24
+; CHECK-NEXT: [[TMP5:%.*]] = sext i1 [[TMP1]] to i64
+; CHECK-NEXT: [[G62:%.*]] = getelementptr i177, ptr [[G11]], i64 [[TMP5]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i177 [[L_FROZEN]], -1
+; CHECK-NEXT: [[B28:%.*]] = select i1 [[TMP6]], i177 0, i177 [[L_FROZEN]]
; CHECK-NEXT: store i177 [[B28]], ptr [[G62]], align 4
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/InstCombine/shl-sub.ll b/llvm/test/Transforms/InstCombine/shl-sub.ll
index 962cf0562ae4e4..b797128f66e6d7 100644
--- a/llvm/test/Transforms/InstCombine/shl-sub.ll
+++ b/llvm/test/Transforms/InstCombine/shl-sub.ll
@@ -169,8 +169,7 @@ define <3 x i64> @shl_sub_i64_vec_undef_bad(<3 x i64> %x) {
define <3 x i64> @shl_sub_i64_vec_poison_bad2(<3 x i64> %x) {
; CHECK-LABEL: @shl_sub_i64_vec_poison_bad2(
-; CHECK-NEXT: [[S:%.*]] = sub <3 x i64> <i64 63, i64 poison, i64 63>, [[X:%.*]]
-; CHECK-NEXT: [[R:%.*]] = shl nuw <3 x i64> <i64 1, i64 poison, i64 1>, [[S]]
+; CHECK-NEXT: [[R:%.*]] = lshr exact <3 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]]
; CHECK-NEXT: ret <3 x i64> [[R]]
;
%s = sub <3 x i64> <i64 63, i64 poison, i64 63>, %x
diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll
index a84e389f13c3b8..23d9dcf8fad46b 100644
--- a/llvm/test/Transforms/InstCombine/sub.ll
+++ b/llvm/test/Transforms/InstCombine/sub.ll
@@ -2351,9 +2351,8 @@ define <2 x i8> @sub_to_and_vector1(<2 x i8> %x) {
define <2 x i8> @sub_to_and_vector2(<2 x i8> %x) {
; CHECK-LABEL: @sub_to_and_vector2(
-; CHECK-NEXT: [[SUB:%.*]] = sub nuw <2 x i8> <i8 71, i8 poison>, [[X:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[SUB]], <i8 120, i8 120>
-; CHECK-NEXT: [[R:%.*]] = sub nsw <2 x i8> <i8 77, i8 77>, [[AND]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 120, i8 120>
+; CHECK-NEXT: [[R:%.*]] = add nuw <2 x i8> [[TMP1]], <i8 13, i8 13>
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%sub = sub nuw <2 x i8> <i8 71, i8 poison>, %x
@@ -2365,9 +2364,8 @@ define <2 x i8> @sub_to_and_vector2(<2 x i8> %x) {
define <2 x i8> @sub_to_and_vector3(<2 x i8> %x) {
; CHECK-LABEL: @sub_to_and_vector3(
-; CHECK-NEXT: [[SUB:%.*]] = sub nuw <2 x i8> <i8 71, i8 71>, [[X:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[SUB]], <i8 120, i8 poison>
-; CHECK-NEXT: [[R:%.*]] = sub nsw <2 x i8> <i8 44, i8 44>, [[AND]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 120, i8 120>
+; CHECK-NEXT: [[R:%.*]] = add nsw <2 x i8> [[TMP1]], <i8 -20, i8 -20>
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%sub = sub nuw <2 x i8> <i8 71, i8 71>, %x
@@ -2379,9 +2377,8 @@ define <2 x i8> @sub_to_and_vector3(<2 x i8> %x) {
define <2 x i8> @sub_to_and_vector4(<2 x i8> %x) {
; CHECK-LABEL: @sub_to_and_vector4(
-; CHECK-NEXT: [[SUB:%.*]] = sub nuw <2 x i8> <i8 71, i8 71>, [[X:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[SUB]], <i8 120, i8 120>
-; CHECK-NEXT: [[R:%.*]] = sub nsw <2 x i8> <i8 88, i8 poison>, [[AND]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 120, i8 120>
+; CHECK-NEXT: [[R:%.*]] = add nuw <2 x i8> [[TMP1]], <i8 24, i8 24>
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%sub = sub nuw <2 x i8> <i8 71, i8 71>, %x
diff --git a/llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll b/llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
index c50a3d06d24b9c..551bba8beab92d 100644
--- a/llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
+++ b/llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
@@ -96,8 +96,8 @@ define <2 x i8> @trunc_lshr_trunc_nonuniform_outofrange(<2 x i64> %a) {
define i8 @trunc_ashr_trunc(i64 %a) {
; CHECK-LABEL: @trunc_ashr_trunc(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[A:%.*]], 8
-; CHECK-NEXT: [[D:%.*]] = trunc i64 [[TMP1]] to i8
+; CHECK-NEXT: [[C1:%.*]] = lshr i64 [[A:%.*]], 8
+; CHECK-NEXT: [[D:%.*]] = trunc i64 [[C1]] to i8
; CHECK-NEXT: ret i8 [[D]]
;
%b = trunc i64 %a to i32
@@ -108,8 +108,8 @@ define i8 @trunc_ashr_trunc(i64 %a) {
define i8 @trunc_ashr_trunc_exact(i64 %a) {
; CHECK-LABEL: @trunc_ashr_trunc_exact(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i64 [[A:%.*]], 8
-; CHECK-NEXT: [[D:%.*]] = trunc i64 [[TMP1]] to i8
+; CHECK-NEXT: [[C1:%.*]] = lshr exact i64 [[A:%.*]], 8
+; CHECK-NEXT: [[D:%.*]] = trunc i64 [[C1]] to i8
; CHECK-NEXT: ret i8 [[D]]
;
%b = trunc i64 %a to i32
@@ -120,8 +120,8 @@ define i8 @trunc_ashr_trunc_exact(i64 %a) {
define <2 x i8> @trunc_ashr_trunc_uniform(<2 x i64> %a) {
; CHECK-LABEL: @trunc_ashr_trunc_uniform(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i64> [[A:%.*]], <i64 8, i64 8>
-; CHECK-NEXT: [[D:%.*]] = trunc <2 x i64> [[TMP1]] to <2 x i8>
+; CHECK-NEXT: [[C1:%.*]] = lshr <2 x i64> [[A:%.*]], <i64 8, i64 8>
+; CHECK-NEXT: [[D:%.*]] = trunc <2 x i64> [[C1]] to <2 x i8>
; CHECK-NEXT: ret <2 x i8> [[D]]
;
%b = trunc <2 x i64> %a to <2 x i32>
@@ -144,7 +144,7 @@ define <2 x i8> @trunc_ashr_trunc_nonuniform(<2 x i64> %a) {
define <2 x i8> @trunc_ashr_trunc_uniform_poison(<2 x i64> %a) {
; CHECK-LABEL: @trunc_ashr_trunc_uniform_poison(
-; CHECK-NEXT: [[C1:%.*]] = ashr <2 x i64> [[A:%.*]], <i64 8, i64 poison>
+; CHECK-NEXT: [[C1:%.*]] = lshr <2 x i64> [[A:%.*]], <i64 8, i64 poison>
; CHECK-NEXT: [[D:%.*]] = trunc <2 x i64> [[C1]] to <2 x i8>
; CHECK-NEXT: ret <2 x i8> [[D]]
;
diff --git a/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
index a87364600ba308..3ab9711d9c97a1 100644
--- a/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
+++ b/llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
@@ -40,8 +40,7 @@ define <2 x i1> @and_cmp_is_trunc_even_with_poison_elt(<2 x i64> %a) {
define <2 x i1> @and_cmp_is_trunc_even_with_poison_elts(<2 x i64> %a) {
; CHECK-LABEL: @and_cmp_is_trunc_even_with_poison_elts(
-; CHECK-NEXT: [[T:%.*]] = and <2 x i64> [[A:%.*]], <i64 poison, i64 1>
-; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i64> [[T]], <i64 poison, i64 0>
+; CHECK-NEXT: [[R:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t = and <2 x i64> %a, <i64 poison, i64 1>
diff --git a/llvm/test/Transforms/InstCombine/vector-casts.ll b/llvm/test/Transforms/InstCombine/vector-casts.ll
index fd2a4ffdfb7092..b1021ae956f123 100644
--- a/llvm/test/Transforms/InstCombine/vector-casts.ll
+++ b/llvm/test/Transforms/InstCombine/vector-casts.ll
@@ -40,8 +40,7 @@ define <2 x i1> @and_cmp_is_trunc_even_with_poison_elt(<2 x i64> %a) {
define <2 x i1> @and_cmp_is_trunc_even_with_poison_elts(<2 x i64> %a) {
; CHECK-LABEL: @and_cmp_is_trunc_even_with_poison_elts(
-; CHECK-NEXT: [[T:%.*]] = and <2 x i64> [[A:%.*]], <i64 poison, i64 1>
-; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i64> [[T]], <i64 poison, i64 0>
+; CHECK-NEXT: [[R:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t = and <2 x i64> %a, <i64 poison, i64 1>
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