[llvm] [SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (PR #89133)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 17 13:10:16 PDT 2024
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/89133
None
>From 5a991b7c12c8fa39b1fff09401f7d565b2d8177e Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 17 Apr 2024 13:00:12 -0700
Subject: [PATCH] [SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY
nodes.
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index ca0a95750ba8d8..ee73ce4959eed0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -9915,6 +9915,17 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
}
break;
}
+ case ISD::SADDO_CARRY:
+ case ISD::UADDO_CARRY:
+ case ISD::SSUBO_CARRY:
+ case ISD::USUBO_CARRY:
+ assert(VTList.NumVTs == 2 && Ops.size() == 3 &&
+ "Invalid add/sub overflow op!");
+ assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
+ Ops[0].getValueType() == Ops[1].getValueType() &&
+ Ops[0].getValueType() == VTList.VTs[0] &&
+ "Binary operator types must match!");
+ break;
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI: {
assert(VTList.NumVTs == 2 && Ops.size() == 2 && "Invalid mul lo/hi op!");
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