[llvm] [RISCV] Add test case for CASE_VFMA_CHANGE_OPCODE_VV to handle MF4 pseudos (PR #88947)

[Michael Maitland via llvm-commits]

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@@ -2950,7 +2950,7 @@ bool RISCVInstrInfo::findCommutedOpIndices(const MachineInstr &MI,
   CASE_VFMA_CHANGE_OPCODE_LMULS_M1(OLDOP, NEWOP, TYPE, SEW)
 
 #define CASE_VFMA_CHANGE_OPCODE_VV(OLDOP, NEWOP)                               \
-  CASE_VFMA_CHANGE_OPCODE_LMULS_MF2(OLDOP, NEWOP, VV, E16)                     \
+  CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(OLDOP, NEWOP, VV, E16)                     \
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michaelmaitland wrote:

rebased and updated title/description

https://github.com/llvm/llvm-project/pull/88947