[llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 17 09:52:25 PDT 2024


================
@@ -524,7 +524,7 @@ class HLoad_r<bits<7> funct7, bits<5> funct5, string opcodestr>
 // Operands for stores are in the order srcreg, base, offset rather than
 // reflecting the order these fields are specified in the instruction
 // encoding.
-let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in {
+let hasSideEffects = 0, mayLoad = 0, mayStore = 1, UseNamedOperandTable = 1 in {
----------------
topperc wrote:

What is this needed for?

https://github.com/llvm/llvm-project/pull/89047


More information about the llvm-commits mailing list