[llvm] [AArch64][CodeGen] Fix illegal register aliasing bug for mops instrs (PR #88869)

[Jack Styles via llvm-commits]

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@@ -1,26 +1,14 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: llc -O1 -mtriple=aarch64-none-linux-gnu -mattr=+mops -o - %s  | FileCheck %s
 
 define void @call_memset_intrinsic() #0 {
 ; CHECK-LABEL: call_memset_intrinsic:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    sub sp, sp, #80
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
-; CHECK-NEXT:    movi v0.16b, #64
-; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    mov w9, #64 // =0x40
-; CHECK-NEXT:    mov w10, #64 // =0x40
-; CHECK-NEXT:    add x8, x8, #64
-; CHECK-NEXT:    stp q0, q0, [sp]
-; CHECK-NEXT:    stp q0, q0, [sp, #32]
-; CHECK-NEXT:    setp [x{{[0-9]+}}]!, x{{[0-9]+}}!, x{{[0-9]+}}
+; CHECK:         setp [x{{[0-9]+}}]!, x{{[0-9]+}}!, x{{[0-9]+}}
----------------
Stylie777 wrote:

Do we care about the lines that have been removed here? I would like to understand the justification of removing the check of the setup for the MOPS instruction.

https://github.com/llvm/llvm-project/pull/88869