[llvm] [SystemZ] Enable MachineCombiner for FP reassociation (PR #83546)

[Jonas Paulsson via llvm-commits]

JonPsson1 wrote:

Patch finalised for review. Waiting with FMA patterns as they sofar give no performance improvement, and optimizeLoadInstr() simplified to only fold 12-bit displacements.

- optimizeLoadInstr() MRI argument needs to be non-const as the SystemZ implementation calls setRegClass().

- The reg/reg pseudos that clobber CC need to be converted to the real target instruction in the case where
it was not folded to a reg/mem during peephole-opt. This should be done before pre-ra machine scheduler, but
the question is where. The patch currently adds a simple pass that does only this, but this is slightly
bulky although simple. As an alternative, it seems possible to do this in createMachineScheduler() instead, although that is
not the basic intent of that method (and in theory it is better to do it as early as possible). Another option
might be to even ignore the effects of the CC operand during regalloc (scheduling) and handle it somewhere else later.

- I tried changing the SystemZ::optimizeLoadInstr() check for a hasOneNonDBGUse into an assertion as I thought the Peephole optimizer should already be doing this. However, it seems it is checking for a single *instruction*
  user, not just a single use operand. Changing this in Peephole opt gave test failures on X86, which may
  or may not be real. Perhaps worth a follow-up.


https://github.com/llvm/llvm-project/pull/83546