[llvm] [RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (PR #88805)

Francesco Petrogalli via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 17 02:00:29 PDT 2024

Previous message: [llvm] [RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (PR #88805)
Next message: [llvm] [coroutines][CoroSplit] Store allocas on the frame if there is no exp… …licit lifetime.end (PR #88806)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

fpetrogalli wrote:

> I'm planning to move all extension information to RISCVFeatures.td and have tablegen create the tables for RISCVISAInfo.cpp.

@topperc  - I am looking forward of this. Feel free to add me as a reviewer.

Francesco

https://github.com/llvm/llvm-project/pull/88805

Previous message: [llvm] [RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (PR #88805)
Next message: [llvm] [coroutines][CoroSplit] Store allocas on the frame if there is no exp… …licit lifetime.end (PR #88806)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list