[llvm] [PowerPC] `ANDI_rec_1_*` should define CR0 (PR #89034)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 17 00:57:57 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-powerpc
Author: Kai Luo (bzEq)
<details>
<summary>Changes</summary>
These pseudo instructions finally copy the result to CR0 so they should define `CR0` in their definitions.
---
Full diff: https://github.com/llvm/llvm-project/pull/89034.diff
1 Files Affected:
- (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.td (+2)
``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 6423e692d88c37..454428e83084b9 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -4189,6 +4189,7 @@ def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETUGT)),
def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETNE)),
(SELECT_VRRC (CRXOR $lhs, $rhs), $tval, $fval)>;
+let Defs = [CR0] in {
def ANDI_rec_1_EQ_BIT : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins gprc:$in),
"#ANDI_rec_1_EQ_BIT",
[(set i1:$dst, (trunc (not i32:$in)))]>;
@@ -4202,6 +4203,7 @@ def ANDI_rec_1_EQ_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc:
def ANDI_rec_1_GT_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc:$in),
"#ANDI_rec_1_GT_BIT8",
[(set i1:$dst, (trunc i64:$in))]>;
+}
def : Pat<(i1 (not (trunc i32:$in))),
(ANDI_rec_1_EQ_BIT $in)>;
``````````
</details>
https://github.com/llvm/llvm-project/pull/89034
More information about the llvm-commits
mailing list