[llvm] [RISCV] Strength reduce mul by 2^M - 3/5/9 (PR #88993)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 17 00:51:44 PDT 2024
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@@ -49,19 +53,24 @@ define i64 @add_mul_combine_accept_a3(i64 %x) {
; RV32IMB-LABEL: add_mul_combine_accept_a3:
; RV32IMB: # %bb.0:
; RV32IMB-NEXT: li a2, 29
-; RV32IMB-NEXT: mul a1, a1, a2
-; RV32IMB-NEXT: mulhu a3, a0, a2
-; RV32IMB-NEXT: add a1, a3, a1
-; RV32IMB-NEXT: mul a2, a0, a2
+; RV32IMB-NEXT: mulhu a2, a0, a2
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dtcxzyw wrote:
FYI, Syntacore SCR1 has single-cycle integer multiplier :(
https://github.com/llvm/llvm-project/pull/88993
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