[llvm] fca2a49 - [RISCV] Simplify FindRegWithEncoding in copyPhysRegVector. NFC (#89001)

[via llvm-commits]

Author: Craig Topper
Date: 2024-04-16T21:46:57-07:00
New Revision: fca2a493251597967d5d758ea0748c66dd29371a

URL: https://github.com/llvm/llvm-project/commit/fca2a493251597967d5d758ea0748c66dd29371a
DIFF: https://github.com/llvm/llvm-project/commit/fca2a493251597967d5d758ea0748c66dd29371a.diff

LOG: [RISCV] Simplify FindRegWithEncoding in copyPhysRegVector. NFC (#89001)

Instead of searching all encodings, we can convert the encoding back to
a register and use getMatchingSuperReg.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 14b5cbea71722f..8331fc0b8c3024 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -361,15 +361,12 @@ void RISCVInstrInfo::copyPhysRegVector(
     return {RISCVII::LMUL_1, RISCV::VRRegClass, RISCV::VMV1R_V,
             RISCV::PseudoVMV_V_V_M1, RISCV::PseudoVMV_V_I_M1};
   };
-  auto FindRegWithEncoding = [&TRI](const TargetRegisterClass &RegClass,
-                                    uint16_t Encoding) {
-    ArrayRef<MCPhysReg> Regs = RegClass.getRegisters();
-    const auto *FoundReg = llvm::find_if(Regs, [&](MCPhysReg Reg) {
-      return TRI->getEncodingValue(Reg) == Encoding;
-    });
-    // We should be always able to find one valid register.
-    assert(FoundReg != Regs.end());
-    return *FoundReg;
+  auto FindRegWithEncoding = [TRI](const TargetRegisterClass &RegClass,
+                                   uint16_t Encoding) {
+    MCRegister Reg = RISCV::V0 + Encoding;
+    if (&RegClass == &RISCV::VRRegClass)
+      return Reg;
+    return TRI->getMatchingSuperReg(Reg, RISCV::sub_vrm1_0, &RegClass);
   };
   while (I != NumRegs) {
     // For non-segment copying, we only do this once as the registers are always