[llvm] 885b8d9 - [RISCV] Enable mul strength reduction for XTheadBa
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 16 13:28:33 PDT 2024
Author: Philip Reames
Date: 2024-04-16T13:28:11-07:00
New Revision: 885b8d9bb5192267cb2449a9ddec28e20ac9300e
URL: https://github.com/llvm/llvm-project/commit/885b8d9bb5192267cb2449a9ddec28e20ac9300e
DIFF: https://github.com/llvm/llvm-project/commit/885b8d9bb5192267cb2449a9ddec28e20ac9300e.diff
LOG: [RISCV] Enable mul strength reduction for XTheadBa
This vendor extension has the same shift_add as zba, and most of the same
patterns are duplicated. Enable it here too so the configurations don't
diverge.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rv64xtheadba.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index dc7c6f83b98579..7b4bec2f65b741 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13408,7 +13408,7 @@ static SDValue expandMul(SDNode *N, SelectionDAG &DAG,
if (VT != Subtarget.getXLenVT())
return SDValue();
- if (!Subtarget.hasStdExtZba())
+ if (!Subtarget.hasStdExtZba() && !Subtarget.hasVendorXTHeadBa())
return SDValue();
ConstantSDNode *CNode = dyn_cast<ConstantSDNode>(N->getOperand(1));
diff --git a/llvm/test/CodeGen/RISCV/rv64xtheadba.ll b/llvm/test/CodeGen/RISCV/rv64xtheadba.ll
index 6f56babf28f5ec..1450c86c76d05f 100644
--- a/llvm/test/CodeGen/RISCV/rv64xtheadba.ll
+++ b/llvm/test/CodeGen/RISCV/rv64xtheadba.ll
@@ -268,6 +268,23 @@ define i64 @mul96(i64 %a) {
ret i64 %c
}
+define i64 @mul137(i64 %a) {
+; RV64I-LABEL: mul137:
+; RV64I: # %bb.0:
+; RV64I-NEXT: li a1, 137
+; RV64I-NEXT: mul a0, a0, a1
+; RV64I-NEXT: ret
+;
+; RV64XTHEADBA-LABEL: mul137:
+; RV64XTHEADBA: # %bb.0:
+; RV64XTHEADBA-NEXT: th.addsl a1, a0, a0, 3
+; RV64XTHEADBA-NEXT: slli a0, a0, 7
+; RV64XTHEADBA-NEXT: add a0, a0, a1
+; RV64XTHEADBA-NEXT: ret
+ %c = mul i64 %a, 137
+ ret i64 %c
+}
+
define i64 @mul160(i64 %a) {
; RV64I-LABEL: mul160:
; RV64I: # %bb.0:
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