[llvm] [AMDGPU] Fix debug line table for MSG_DEALLOC_VGPRS optimization (PR #88924)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,40 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -O2 -mtriple=amdgcn -mcpu=gfx1100 -run-pass=si-insert-waitcnts -verify-machineinstrs -o - %s | FileCheck %s
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arsenm wrote:

```suggestion
# RUN: llc  -mtriple=amdgcn -mcpu=gfx1100 -run-pass=si-insert-waitcnts  -o - %s | FileCheck %s
```

https://github.com/llvm/llvm-project/pull/88924