[llvm] [SelectionDAG] Treat CopyFromReg as freezing the value (PR #85932)

[Nikita Popov via llvm-commits]

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@@ -202,13 +202,27 @@ define <4 x i32> @freeze_add_vec(<4 x i32> %a0) nounwind {
 define <4 x i32> @freeze_add_vec_undef(<4 x i32> %a0) nounwind {
 ; X86-LABEL: freeze_add_vec_undef:
 ; X86:       # %bb.0:
+; X86-NEXT:    pushl %ebp
+; X86-NEXT:    movl %esp, %ebp
+; X86-NEXT:    andl $-16, %esp
+; X86-NEXT:    subl $32, %esp
+; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl $3, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl $2, {{[0-9]+}}(%esp)
+; X86-NEXT:    movl $1, (%esp)
+; X86-NEXT:    paddd (%esp), %xmm0
 ; X86-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X86-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-NEXT:    movl %ebp, %esp
+; X86-NEXT:    popl %ebp
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nikic wrote:

I think the right place to fix this would be in generic BUILD_VECTOR lowering to constant pool. In that case, we'd want to lower a BUILD_VECTOR that is constant apart from one-use freeze undef to a constant pool load where the freeze undef has been replaced by zero.

A more aggressive alternative would be to just always replace freeze undef with zero. This is essentially what InstCombine does in the middle-end (well, it's a tad smarter and sometimes uses -1 based on usage). But I suspect that just always doing this may not work as well on the SDAG layer.

https://github.com/llvm/llvm-project/pull/85932