[llvm] [TableGen] Use bitwise operations to access HwMode ID. (PR #88377)

[via llvm-commits]

================
@@ -11,22 +11,60 @@
 //
 //===----------------------------------------------------------------------===//
 
+multiclass tmpEclass<bits<3> imm3> {
----------------
superZWT123 wrote:

Sure, in this PR, only the first commit is intended for merging into the main branch. The second commit serves merely as a helpful reference for the review process and is not meant for merging. I can promptly remove it if necessary. I provided a reference implementation on RISCV backend because I think that the testcases in the /TableGen directory may not adequately showcase the PR’s impact fully. Thank you.

https://github.com/llvm/llvm-project/pull/88377