[llvm] [DAGCombine] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 21d177096f84c38cf434c21bd3ff0dbd2ca163d0 1dd280625643bb4cdd47ad0a384080bdc197e8f9 -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 031d1c6e11..238135101e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12453,8 +12453,8 @@ SDValue DAGCombiner::visitSETCC(SDNode *N) {
   // Optimize
   //    (icmp eq/ne (shift N00, N01C), 0) -> (icmp eq/ne N00, 0)
   // If shift is logical and all shifted out bits are known to be zero.
-  if ((Cond == ISD::SETNE || Cond == ISD::SETEQ) &&
-      isNullOrNullSplat(N1) && N0->hasOneUse() &&
+  if ((Cond == ISD::SETNE || Cond == ISD::SETEQ) && isNullOrNullSplat(N1) &&
+      N0->hasOneUse() &&
       (N0.getOpcode() == ISD::SHL || N0.getOpcode() == ISD::SRL)) {
     SDValue N00 = N0.getOperand(0);
     SDValue N01 = N0.getOperand(1);

``````````

</details>


https://github.com/llvm/llvm-project/pull/88801