[llvm] [TableGen] New tblgen Instruction bit to disable DAGISel pattern imports (PR #88382)

[Pierre van Houtryve via llvm-commits]

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@@ -777,6 +777,10 @@ class Instruction : InstructionEncoding {
   /// SelectionDAG can.
   bit FastISelShouldIgnore = false;
 
+  /// Should DAGISel ignore this instruction. In cases where lowering may
+  /// be done elsewhere or is unneeded, DAGISel may skip over them.
+  bit DAGISelShouldIgnore = false;
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Pierre-vh wrote:

I think the bit should be on the `Pat` class, not the `Instruction` class?

Do you want to disable DAG import of any pattern that uses a given instruction, or disable import for a Pat (an in/out selection pattern) ? If it's the latter then it's the wrong place for this bit.

The reason there is a FastISel bit I think is because some instructions are probably too slow to emit and FastISel needs to skip over them (?)

https://github.com/llvm/llvm-project/pull/88382