[llvm] [InstCombine] Propagate exact flags in shift-combine transforms (PR #88340)

[Nikita Popov via llvm-commits]

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@@ -1398,8 +1398,12 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
     if (match(Op0, m_LShr(m_Value(X), m_APInt(C1)))) {
       // Oversized shifts are simplified to zero in InstSimplify.
       unsigned AmtSum = ShAmtC + C1->getZExtValue();
-      if (AmtSum < BitWidth)
-        return BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+      if (AmtSum < BitWidth) {
+        auto *NewLShr =
+            BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+        NewLShr->setIsExact(I.isExact() && cast<Instruction>(Op0)->isExact());
+        return NewLShr;
+      }
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nikic wrote:

I think a test for this case is missing? You have tests for the variant with the interleaved trunc, but not a plain double lshr?

https://github.com/llvm/llvm-project/pull/88340