[llvm] Base with add like constant offset (PR #88493)

[Craig Topper via llvm-commits]

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@@ -5191,15 +5191,8 @@ bool SelectionDAG::isADDLike(SDValue Op) const {
 }
 
 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
-  if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
-      !isa<ConstantSDNode>(Op.getOperand(1)))
-    return false;
-
-  if (Op.getOpcode() == ISD::OR &&
-      !MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
-    return false;
-
-  return true;
+  return (Op.getOpcode() == ISD::ADD || isADDLike(Op)) &&
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topperc wrote:

This can call computeKnownBits on both operands an OR that doesn't have a constant right hand side. Is there better way to do that with the cheap constant right hand side check first?

https://github.com/llvm/llvm-project/pull/88493