[llvm] [hwasan] Optimize outlined memaccess for fixed shadow on Aarch64 (PR #88544)

Thurston Dang via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 12 12:11:16 PDT 2024


================
@@ -929,11 +929,33 @@ void HWAddressSanitizer::instrumentMemAccessOutline(Value *Ptr, bool IsWrite,
 
   IRBuilder<> IRB(InsertBefore);
   Module *M = IRB.GetInsertBlock()->getParent()->getParent();
-  IRB.CreateCall(Intrinsic::getDeclaration(
-                     M, UseShortGranules
-                            ? Intrinsic::hwasan_check_memaccess_shortgranules
-                            : Intrinsic::hwasan_check_memaccess),
-                 {ShadowBase, Ptr, ConstantInt::get(Int32Ty, AccessInfo)});
+
+  // Aarch64 makes it difficult to embed large constants (such as the shadow
+  // offset) in the code. Our intrinsic supports a 16-bit constant (to be left
+  // shifted by 32 bits) - this is not an onerous constraint, since
+  // 1) kShadowBaseAlignment == 32 2) an offset of 4TB (1024 << 32) is
+  // representable, and ought to be good enough for anybody.
+  bool useFixedShadowIntrinsic = true;
+  if (TargetTriple.isAArch64() && ClMappingOffset.getNumOccurrences() > 0 &&
----------------
thurstond wrote:

I'm concerned it may break things, because it will automatically opt Fuchsia and Khwasan into using the fixedshadow intrinsic (unlike on Aarch64 HWASan, where this patch only takes effect if they opt-in to fixed shadows). I don't have the infrastructure set up to test my change on Fuchsia or Khwasan.

https://github.com/llvm/llvm-project/pull/88544


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