[llvm] [hwasan] Optimize outlined memaccess for fixed shadow on Aarch64 (PR #88544)

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Fri Apr 12 10:49:23 PDT 2024


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``````````bash
git-clang-format --diff f27f3697108470c3e995cf3cb454641c22ec1fa9 a8e6fdc2aa9615911512e3447a5d33c7296de996 -- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 5ab54d37f3..b9c9ab3e81 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -553,14 +553,17 @@ void AArch64AsmPrinter::LowerHWASAN_CHECK_MEMACCESS(const MachineInstr &MI) {
   Register Reg = MI.getOperand(0).getReg();
   bool IsShort =
       ((MI.getOpcode() == AArch64::HWASAN_CHECK_MEMACCESS_SHORTGRANULES) ||
-       (MI.getOpcode() == AArch64::HWASAN_CHECK_MEMACCESS_FIXEDSHADOW_SHORTGRANULES));
+       (MI.getOpcode() ==
+        AArch64::HWASAN_CHECK_MEMACCESS_FIXEDSHADOW_SHORTGRANULES));
   uint32_t AccessInfo = MI.getOperand(1).getImm();
 
-  if (MI.getOpcode() == AArch64::HWASAN_CHECK_MEMACCESS_FIXEDSHADOW_SHORTGRANULES) {
-      if (HwasanFixedShadowBase != (unsigned long long)-1)
-        assert(HwasanFixedShadowBase == (unsigned long long) MI.getOperand(2).getImm());
+  if (MI.getOpcode() ==
+      AArch64::HWASAN_CHECK_MEMACCESS_FIXEDSHADOW_SHORTGRANULES) {
+    if (HwasanFixedShadowBase != (unsigned long long)-1)
+      assert(HwasanFixedShadowBase ==
+             (unsigned long long)MI.getOperand(2).getImm());
 
-      HwasanFixedShadowBase = MI.getOperand(2).getImm();
+    HwasanFixedShadowBase = MI.getOperand(2).getImm();
   }
 
   MCSymbol *&Sym =
@@ -638,20 +641,18 @@ void AArch64AsmPrinter::emitHwasanMemaccessSymbols(Module &M) {
 
     if (HwasanFixedShadowBase != (unsigned long long)-1) {
       assert(IsShort);
-      OutStreamer->emitInstruction(
-          MCInstBuilder(AArch64::MOVZXi)
-              .addReg(AArch64::X17)
-              .addImm(HwasanFixedShadowBase >> 32)
-              .addImm(32),
-          *STI);
-      OutStreamer->emitInstruction(
-          MCInstBuilder(AArch64::LDRBBroX)
-              .addReg(AArch64::W16)
-              .addReg(AArch64::X17)
-              .addReg(AArch64::X16)
-              .addImm(0)
-              .addImm(0),
-          *STI);
+      OutStreamer->emitInstruction(MCInstBuilder(AArch64::MOVZXi)
+                                       .addReg(AArch64::X17)
+                                       .addImm(HwasanFixedShadowBase >> 32)
+                                       .addImm(32),
+                                   *STI);
+      OutStreamer->emitInstruction(MCInstBuilder(AArch64::LDRBBroX)
+                                       .addReg(AArch64::W16)
+                                       .addReg(AArch64::X17)
+                                       .addReg(AArch64::X16)
+                                       .addImm(0)
+                                       .addImm(0),
+                                   *STI);
     } else {
       OutStreamer->emitInstruction(
           MCInstBuilder(AArch64::LDRBBroX)
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 41c492a000..230f9477fd 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -936,21 +936,25 @@ void HWAddressSanitizer::instrumentMemAccessOutline(Value *Ptr, bool IsWrite,
   // 1) kShadowBaseAlignment == 32 2) an offset of 4TB (1024 << 32) is
   // representable, and ought to be good enough for anybody.
   bool useFixedShadowIntrinsic = true;
-  if (TargetTriple.isAArch64() && ClMappingOffset.getNumOccurrences() > 0 && UseShortGranules) {
+  if (TargetTriple.isAArch64() && ClMappingOffset.getNumOccurrences() > 0 &&
+      UseShortGranules) {
     uint16_t offset_shifted = Mapping.Offset >> 32;
     if ((uint64_t)offset_shifted << 32 != Mapping.Offset)
-        useFixedShadowIntrinsic = false;
+      useFixedShadowIntrinsic = false;
   } else
     useFixedShadowIntrinsic = false;
 
   if (useFixedShadowIntrinsic)
-    IRB.CreateCall(Intrinsic::getDeclaration(
-                       M, Intrinsic::hwasan_check_memaccess_fixedshadow_shortgranules),
-                   {Ptr, ConstantInt::get(Int32Ty, AccessInfo), ConstantInt::get(Int64Ty, Mapping.Offset)});
+    IRB.CreateCall(
+        Intrinsic::getDeclaration(
+            M, Intrinsic::hwasan_check_memaccess_fixedshadow_shortgranules),
+        {Ptr, ConstantInt::get(Int32Ty, AccessInfo),
+         ConstantInt::get(Int64Ty, Mapping.Offset)});
   else
     IRB.CreateCall(Intrinsic::getDeclaration(
-                       M, UseShortGranules ? Intrinsic::hwasan_check_memaccess_shortgranules
-                                           : Intrinsic::hwasan_check_memaccess),
+                       M, UseShortGranules
+                              ? Intrinsic::hwasan_check_memaccess_shortgranules
+                              : Intrinsic::hwasan_check_memaccess),
                    {ShadowBase, Ptr, ConstantInt::get(Int32Ty, AccessInfo)});
 }
 

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https://github.com/llvm/llvm-project/pull/88544


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