[llvm] [SDAG] Turn umin into smin if the saturation pattern is broken (PR #88505)

[Yingwei Zheng via llvm-commits]

================
@@ -5589,7 +5592,7 @@ SDValue DAGCombiner::visitIMINMAX(SDNode *N) {
     case ISD::UMAX: AltOpcode = ISD::SMAX; break;
     default: llvm_unreachable("Unknown MINMAX opcode");
     }
-    if (TLI.isOperationLegal(AltOpcode, VT))
+    if (IsSatBroken || TLI.isOperationLegal(AltOpcode, VT))
----------------
dtcxzyw wrote:

On risc-v without zbb:
```
define signext i32 @test_umin_smax_usat(i32 signext %x) {
entry:
  %v1 = tail call i32 @llvm.smax.i32(i32 %x, i32 0)
  %v2 = tail call i32 @llvm.umin.i32(i32 %v1, i32 255)
  ret i32 %v2
}
```
```
; Before
# %bb.0:                                # %entry
        sgtz    a1, a0
        neg     a1, a1
        and     a0, a1, a0
        li      a1, 255
        bltu    a0, a1, .LBB0_2
# %bb.1:                                # %entry
        li      a0, 255
.LBB0_2:                                # %entry
        ret
; After
# %bb.0:                                # %entry
        sgtz    a1, a0
        neg     a1, a1
        and     a0, a1, a0
        li      a1, 255
        blt     a0, a1, .LBB0_2
# %bb.1:                                # %entry
        li      a0, 255
.LBB0_2:                                # %entry
        ret
```

It just turns an illegal umin into an illegal smin.


https://github.com/llvm/llvm-project/pull/88505